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[86.14.42.152]) by smtp.googlemail.com with ESMTPSA id j13sm20698332wmi.24.2021.02.01.04.14.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 Feb 2021 04:14:20 -0800 (PST) From: Bilal Wasim X-Google-Original-From: Bilal Wasim To: linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, matthias.bgg@gmail.com, enric.balletbo@collabora.com, hsinyi@chromium.org, weiyi.lu@mediatek.com Subject: [PATCH v2 3/3] arm64: dts: mediatek: mt8173: Add domain supply for mfg_async Date: Mon, 1 Feb 2021 17:14:16 +0500 Message-Id: <20210201121416.1488439-4-Bilal.Wasim@imgtec.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210201121416.1488439-1-Bilal.Wasim@imgtec.com> References: <20210201121416.1488439-1-Bilal.Wasim@imgtec.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210201_071422_278133_0A7F42A2 X-CRM114-Status: GOOD ( 13.10 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org da9211 regulator needs to be enabled before enabling the mfg_async power domain. Otherwise the subdomain is not enabled and causes failure in imgtec gpu driver boot. Add the "domain-supply" property to the "mfg_async" node in DT. Signed-off-by: Bilal Wasim --- arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi | 4 ++++ arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 4 ++++ arch/arm64/boot/dts/mediatek/mt8173.dtsi | 2 +- 3 files changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi b/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi index 21452c51a20a..a8efff2071bf 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi @@ -157,6 +157,10 @@ hdmi_connector_in: endpoint { }; }; +&mfg_async { + domain-supply = <&da9211_vgpu_reg>; +}; + &cec { status = "okay"; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts index 6dffada2e66b..c8eece8f5beb 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts +++ b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts @@ -62,6 +62,10 @@ usb_p0_vbus: regulator@1 { }; }; +&mfg_async { + domain-supply = <&da9211_vgpu_reg>; +}; + &cec { status = "okay"; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi index 7fa870e4386a..31d23099df90 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi @@ -504,7 +504,7 @@ power-domain@MT8173_POWER_DOMAIN_USB { reg = ; #power-domain-cells = <0>; }; - power-domain@MT8173_POWER_DOMAIN_MFG_ASYNC { + mfg_async: power-domain@MT8173_POWER_DOMAIN_MFG_ASYNC { reg = ; clocks = <&clk26m>; clock-names = "mfg";