| Message ID | 20210710113819.5170-2-jason-jh.lin@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add MediaTek SoC DRM (vdosys0) support for mt8195 | expand |
Hi, Jason: jason-jh.lin <jason-jh.lin@mediatek.com> 於 2021年7月10日 週六 下午7:38寫道： > > Add definition for mt8195 display. > > Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com> > --- > .../bindings/display/mediatek/mediatek,disp.txt | 9 +++++++-- > 1 file changed, 7 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt > index fbb59c9ddda6..de6226d4bca3 100644 > --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt > +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt > @@ -37,6 +37,7 @@ Required properties (all function blocks): > "mediatek,<chip>-disp-aal" - adaptive ambient light controller > "mediatek,<chip>-disp-gamma" - gamma correction > "mediatek,<chip>-disp-merge" - merge streams from two RDMA sources > + "mediatek,<chip>-disp-dsc" - DSC controller, see mediatek,dsc.yaml You add dsc binding document in yaml format, so I would like you to change this binding document to yaml format. Regards, Chun-Kuang. > "mediatek,<chip>-disp-postmask" - control round corner for display frame > "mediatek,<chip>-disp-split" - split stream to two encoders > "mediatek,<chip>-disp-ufoe" - data compression engine > @@ -44,7 +45,7 @@ Required properties (all function blocks): > "mediatek,<chip>-dpi" - DPI controller, see mediatek,dpi.txt > "mediatek,<chip>-disp-mutex" - display mutex > "mediatek,<chip>-disp-od" - overdrive > - the supported chips are mt2701, mt7623, mt2712, mt8167, mt8173, mt8183 and mt8192. > + the supported chips are mt2701, mt7623, mt2712, mt8167, mt8173, mt8183, mt8192 and mt8195. > - reg: Physical base address and length of the function block register space > - interrupts: The interrupt signal from the function block (required, except for > merge and split function blocks). > @@ -60,7 +61,7 @@ Required properties (DMA function blocks): > "mediatek,<chip>-disp-ovl" > "mediatek,<chip>-disp-rdma" > "mediatek,<chip>-disp-wdma" > - the supported chips are mt2701, mt8167 and mt8173. > + the supported chips are mt2701, mt8167, mt8173 and mt8195. > - larb: Should contain a phandle pointing to the local arbiter device as defined > in Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml > - iommus: Should point to the respective IOMMU block with master port as > @@ -217,3 +218,7 @@ od@14023000 { > power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; > clocks = <&mmsys CLK_MM_DISP_OD>; > }; > + > +dsc0: disp_dsc_wrap@1c009000 { > + /* See mediatek,dsc.yaml for details */ > +}; > -- > 2.18.0 >
On Sun, 2021-07-11 at 09:21 +0800, Chun-Kuang Hu wrote: > Hi, Jason: > > jason-jh.lin <jason-jh.lin@mediatek.com> 於 2021年7月10日 週六 下午7:38寫道： > > > > Add definition for mt8195 display. > > > > Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com> > > --- > > .../bindings/display/mediatek/mediatek,disp.txt | 9 > > +++++++-- > > 1 file changed, 7 insertions(+), 2 deletions(-) > > > > diff --git > > a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp. > > txt > > b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp. > > txt > > index fbb59c9ddda6..de6226d4bca3 100644 > > --- > > a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp. > > txt > > +++ > > b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp. > > txt > > @@ -37,6 +37,7 @@ Required properties (all function blocks): > > "mediatek,<chip>-disp-aal" - adaptive ambient > > light controller > > "mediatek,<chip>-disp-gamma" - gamma correction > > "mediatek,<chip>-disp-merge" - merge streams > > from two RDMA sources > > + "mediatek,<chip>-disp-dsc" - DSC controller, > > see mediatek,dsc.yaml > > You add dsc binding document in yaml format, so I would like you to > change this binding document to yaml format. > > Regards, > Chun-Kuang. > Hi CK, OK, I will change this binding document to yaml format at the next version. Regards, Jason-JH.Lin > > "mediatek,<chip>-disp-postmask" - control round > > corner for display frame > > "mediatek,<chip>-disp-split" - split stream to > > two encoders > > "mediatek,<chip>-disp-ufoe" - data compression > > engine > > @@ -44,7 +45,7 @@ Required properties (all function blocks): > > "mediatek,<chip>-dpi" - DPI controller, > > see mediatek,dpi.txt > > "mediatek,<chip>-disp-mutex" - display mutex > > "mediatek,<chip>-disp-od" - overdrive > > - the supported chips are mt2701, mt7623, mt2712, mt8167, mt8173, > > mt8183 and mt8192. > > + the supported chips are mt2701, mt7623, mt2712, mt8167, mt8173, > > mt8183, mt8192 and mt8195. > > - reg: Physical base address and length of the function block > > register space > > - interrupts: The interrupt signal from the function block > > (required, except for > > merge and split function blocks). > > @@ -60,7 +61,7 @@ Required properties (DMA function blocks): > > "mediatek,<chip>-disp-ovl" > > "mediatek,<chip>-disp-rdma" > > "mediatek,<chip>-disp-wdma" > > - the supported chips are mt2701, mt8167 and mt8173. > > + the supported chips are mt2701, mt8167, mt8173 and mt8195. > > - larb: Should contain a phandle pointing to the local arbiter > > device as defined > > in Documentation/devicetree/bindings/memory- > > controllers/mediatek,smi-larb.yaml > > - iommus: Should point to the respective IOMMU block with master > > port as > > @@ -217,3 +218,7 @@ od@14023000 { > > power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; > > clocks = <&mmsys CLK_MM_DISP_OD>; > > }; > > + > > +dsc0: disp_dsc_wrap@1c009000 { > > + /* See mediatek,dsc.yaml for details */ > > +}; > > -- > > 2.18.0 > >
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt index fbb59c9ddda6..de6226d4bca3 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt @@ -37,6 +37,7 @@ Required properties (all function blocks): "mediatek,<chip>-disp-aal" - adaptive ambient light controller "mediatek,<chip>-disp-gamma" - gamma correction "mediatek,<chip>-disp-merge" - merge streams from two RDMA sources + "mediatek,<chip>-disp-dsc" - DSC controller, see mediatek,dsc.yaml "mediatek,<chip>-disp-postmask" - control round corner for display frame "mediatek,<chip>-disp-split" - split stream to two encoders "mediatek,<chip>-disp-ufoe" - data compression engine @@ -44,7 +45,7 @@ Required properties (all function blocks): "mediatek,<chip>-dpi" - DPI controller, see mediatek,dpi.txt "mediatek,<chip>-disp-mutex" - display mutex "mediatek,<chip>-disp-od" - overdrive - the supported chips are mt2701, mt7623, mt2712, mt8167, mt8173, mt8183 and mt8192. + the supported chips are mt2701, mt7623, mt2712, mt8167, mt8173, mt8183, mt8192 and mt8195. - reg: Physical base address and length of the function block register space - interrupts: The interrupt signal from the function block (required, except for merge and split function blocks). @@ -60,7 +61,7 @@ Required properties (DMA function blocks): "mediatek,<chip>-disp-ovl" "mediatek,<chip>-disp-rdma" "mediatek,<chip>-disp-wdma" - the supported chips are mt2701, mt8167 and mt8173. + the supported chips are mt2701, mt8167, mt8173 and mt8195. - larb: Should contain a phandle pointing to the local arbiter device as defined in Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml - iommus: Should point to the respective IOMMU block with master port as @@ -217,3 +218,7 @@ od@14023000 { power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; clocks = <&mmsys CLK_MM_DISP_OD>; }; + +dsc0: disp_dsc_wrap@1c009000 { + /* See mediatek,dsc.yaml for details */ +};
Add definition for mt8195 display. Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com> --- .../bindings/display/mediatek/mediatek,disp.txt | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-)