From patchwork Thu Apr 28 11:56:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?UmV4LUJDIENoZW4gKOmZs+afj+i+sCk=?= X-Patchwork-Id: 12830555 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 28B77C433EF for ; Thu, 28 Apr 2022 11:57:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=UQCV3BPEWJuTC+8ANPZRzfEzpP882L+s4Qkjf1QfF+U=; b=Y0vhHe7guNEcbR LH04aA0rTk54ivak0NobVXacVHe0aj7RmV6JY9t12CPOvNMwrGpgmfY+h9CTNJvlRlT9RFVca5ifQ 9d7s1dY2tsgFSmCtPSQANOvBtZTOlVlNrdFY6Try49drakyA9mz27iJr4VoWUWgiWhcazrPA0HIz1 /eA0HSUfL1uYtF6SSPGMv8g1uQYupTxLwUBhSWkwIQo4A9fbRVpBHtMMUSrme7q10PbFD8M5DVp8h gsDy8+Yr1jl9R5MmoQ7BhfWIavcdhNprXGObbVgV+bKR6bvYd/no3Sr+HOuN041JPBsP10k/BMaCS 5kgc6La3PltSCoVhtvEQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nk2lo-006cX2-5P; Thu, 28 Apr 2022 11:57:16 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nk2l7-006cAI-Vj; Thu, 28 Apr 2022 11:56:35 +0000 X-UUID: 016d49ebc22241d88958dd225db0f6ac-20220428 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.4, REQID:1e994521-4a98-4d4c-9f80-ed7852bd5e9b, OB:0, LO B:0,IP:0,URL:0,TC:0,Content:-20,EDM:0,RT:0,SF:0,FILE:0,RULE:Release_Ham,AC TION:release,TS:-20 X-CID-META: VersionHash:faefae9, CLOUDID:5665d4c6-85ee-4ac1-ac05-bd3f1e72e732, C OID:IGNORED,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,File:nil,QS:0,BEC:nil X-UUID: 016d49ebc22241d88958dd225db0f6ac-20220428 Received: from mtkcas67.mediatek.inc [(172.29.193.45)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1258257544; Thu, 28 Apr 2022 04:56:25 -0700 Received: from mtkmbs07n1.mediatek.inc (172.21.101.16) by MTKMBS62DR.mediatek.inc (172.29.94.18) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 28 Apr 2022 04:56:24 -0700 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 28 Apr 2022 19:56:21 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 28 Apr 2022 19:56:21 +0800 From: Rex-BC Chen To: , , , , CC: , , , , , , , , , , , Rex-BC Chen Subject: [PATCH V5 01/16] clk: mediatek: reset: Add reset.h Date: Thu, 28 Apr 2022 19:56:04 +0800 Message-ID: <20220428115620.13512-2-rex-bc.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220428115620.13512-1-rex-bc.chen@mediatek.com> References: <20220428115620.13512-1-rex-bc.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220428_045634_074245_153E7682 X-CRM114-Status: GOOD ( 15.45 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Add a new file "reset.h" to place some definitions for clock reset. Signed-off-by: Rex-BC Chen Reviewed-by: AngeloGioacchino Del Regno --- drivers/clk/mediatek/clk-mtk.h | 8 ++------ drivers/clk/mediatek/reset.c | 9 +-------- drivers/clk/mediatek/reset.h | 24 ++++++++++++++++++++++++ 3 files changed, 27 insertions(+), 14 deletions(-) create mode 100644 drivers/clk/mediatek/reset.h diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h index bf6565aa7319..a6d0f24c62fa 100644 --- a/drivers/clk/mediatek/clk-mtk.h +++ b/drivers/clk/mediatek/clk-mtk.h @@ -13,6 +13,8 @@ #include #include +#include "reset.h" + #define MAX_MUX_GATE_BIT 31 #define INVALID_MUX_GATE_BIT (MAX_MUX_GATE_BIT + 1) @@ -190,12 +192,6 @@ void mtk_free_clk_data(struct clk_onecell_data *clk_data); struct clk *mtk_clk_register_ref2usb_tx(const char *name, const char *parent_name, void __iomem *reg); -void mtk_register_reset_controller(struct device_node *np, - unsigned int num_regs, int regofs); - -void mtk_register_reset_controller_set_clr(struct device_node *np, - unsigned int num_regs, int regofs); - struct mtk_clk_desc { const struct mtk_gate *clks; size_t num_clks; diff --git a/drivers/clk/mediatek/reset.c b/drivers/clk/mediatek/reset.c index bcec4b89f449..9f3cb22aea1b 100644 --- a/drivers/clk/mediatek/reset.c +++ b/drivers/clk/mediatek/reset.c @@ -8,16 +8,9 @@ #include #include #include -#include #include -#include "clk-mtk.h" - -struct mtk_reset { - struct regmap *regmap; - int regofs; - struct reset_controller_dev rcdev; -}; +#include "reset.h" static int mtk_reset_assert_set_clr(struct reset_controller_dev *rcdev, unsigned long id) diff --git a/drivers/clk/mediatek/reset.h b/drivers/clk/mediatek/reset.h new file mode 100644 index 000000000000..764a8affe206 --- /dev/null +++ b/drivers/clk/mediatek/reset.h @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2022 MediaTek Inc. + */ + +#ifndef __DRV_CLK_MTK_RESET_H +#define __DRV_CLK_MTK_RESET_H + +#include +#include + +struct mtk_reset { + struct regmap *regmap; + int regofs; + struct reset_controller_dev rcdev; +}; + +void mtk_register_reset_controller(struct device_node *np, + unsigned int num_regs, int regofs); + +void mtk_register_reset_controller_set_clr(struct device_node *np, + unsigned int num_regs, int regofs); + +#endif /* __DRV_CLK_MTK_RESET_H */