From patchwork Thu May 5 19:45:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 12840119 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EFD77C433F5 for ; Thu, 5 May 2022 19:49:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=us0LQCbwUzBNGUQdPcqIptnAzCMbufmWrBobEDJlctM=; b=wkGEKv7hCWletF 9FeX8U2B+CX1pBTOo157SqDPUO4+XubDR/B0EQjBK+E3yZb+rvLa2LoGInFFfg/0isQt4BUwTznMR xl3tpYKQi7Vl1fQKKnW/u9TrFUN5McXOBcSB4DRBLmu+Nta/NqV9VPBrEkNUw7YmMa8DCs2Sdre87 velUN5ZnLaai5PWGDfsFyu2nWGuEn6aF9zqBFN6xwAmqF1asILNZeJKmt521jzQPCyHHSEj2NYFyI AbtoQwsk5yIWOpui5oQFmkSy2GsnJ6M/2o3D0ir1y55350iKjpcNjRmTETz9ItGScb6OUTNJutBEk 4RB74OIiHj/b2/ebXViA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmhTz-00Ha9E-Nm; Thu, 05 May 2022 19:49:51 +0000 Received: from bhuna.collabora.co.uk ([46.235.227.227]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmhR1-00HXun-7B; Thu, 05 May 2022 19:46:48 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id E54C31F45CCE DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1651780006; bh=1u4qe9l+DHtHmHsuoC7WXDiH41P3SfBlsVHP90O4+hc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iUsc7EfC2p097+dI8XIPo9JDk6gX753g0G1/Si2UqCm3ikI747zz/stCNIK6Dpmqz P6BHLqVWuG19pE3sJUTgoqX8NbHjh6yg8cu2tXKEukziIva+Y7BkG1LZWgBE3fMQ2t 502HkgGOGV8vDP51J/YRgaUXYprC9nR4i2QInYLc5wHX/9ZsgvUp+/Q5hMHNRriJ39 ash6cLkfw5OvlDY86v2jxVxND0LSPmI6gUmVLiLsrqMYFZEJwjTzvX6HLEYMyhuhpD JxgTlUZmDEgiBJjniQ50ztDlvHyTlGiu9bKeVSk5VDAaEHWyp5vUISWZUrMs1CA8Nz LZOtzseQwk5aw== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Matthias Brugger Cc: AngeloGioacchino Del Regno , kernel@collabora.com, Chen-Yu Tsai , =?utf-8?b?TsOtY29s?= =?utf-8?b?YXMgRi4gUi4gQS4gUHJhZG8=?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 11/16] arm64: dts: mediatek: asurada: Add I2C touchscreen Date: Thu, 5 May 2022 15:45:45 -0400 Message-Id: <20220505194550.3094656-12-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220505194550.3094656-1-nfraprado@collabora.com> References: <20220505194550.3094656-1-nfraprado@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220505_124647_469435_9EEEF86B X-CRM114-Status: GOOD ( 11.49 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org All machines of the Asurada platform have a touchscreen at address 0x10 in the I2C0 bus, but the devices vary: Spherion has the Elan eKTH3500 touchscreen, while Hayato has a generic HID-over-i2c touchscreen. Add common support for the touchscreens on the platform and the specifics in each board file. Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno --- (no changes since v1) .../dts/mediatek/mt8192-asurada-hayato-r1.dts | 7 ++++++ .../mediatek/mt8192-asurada-spherion-r0.dts | 4 +++ .../boot/dts/mediatek/mt8192-asurada.dtsi | 25 +++++++++++++++++++ 3 files changed, 36 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r1.dts b/arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r1.dts index 00c76709a055..b62c747e9e54 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r1.dts +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r1.dts @@ -9,3 +9,10 @@ / { model = "Google Hayato rev1"; compatible = "google,hayato-rev1", "google,hayato", "mediatek,mt8192"; }; + +&touchscreen { + compatible = "hid-over-i2c"; + post-power-on-delay-ms = <10>; + hid-descr-addr = <0x0001>; + vdd-supply = <&pp3300_u>; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts b/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts index d384d584bbcf..35d9c5294fe0 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts @@ -11,3 +11,7 @@ / { "google,spherion-rev1", "google,spherion-rev0", "google,spherion", "mediatek,mt8192"; }; + +&touchscreen { + compatible = "elan,ekth3500"; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi index a15e84d86449..c852cb0e8b63 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -92,6 +92,13 @@ &i2c0 { clock-frequency = <400000>; pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins>; + + touchscreen: touchscreen@10 { + reg = <0x10>; + interrupts-extended = <&pio 21 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&touchscreen_pins>; + }; }; &i2c1 { @@ -458,6 +465,24 @@ pins-int-n { mediatek,pull-up-adv = <3>; }; }; + + touchscreen_pins: touchscreen-default-pins { + pins-irq { + pinmux = ; + input-enable; + bias-pull-up; + }; + + pins-reset { + pinmux = ; + output-high; + }; + + pins-report-sw { + pinmux = ; + output-low; + }; + }; }; &spi1 {