Message ID | 20220513170350.502501-1-angelogioacchino.delregno@collabora.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | soc: mediatek: mtk-mmsys: Add support for MT6795 Helio X10 | expand |
Hi, Angelo: On Fri, 2022-05-13 at 19:03 +0200, AngeloGioacchino Del Regno wrote: > Add MM support for the MT6795 SoC, using the mmsys default routing > table. > > Signed-off-by: AngeloGioacchino Del Regno < > angelogioacchino.delregno@collabora.com> > --- > > In order for this patch to have any meaning and functionality, it is > required to also have in-tree the [1] MT6795 clocks series, even > though that's not required to actually compile this code. > > [1] > https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/list/?series=641493__;!!CTRNKA9wMg0ARbw!ywDb_Gj4oV0iYHK_PbtJSNejzsJGlFVjX-1O0G1mR0vZX_5VeMtlZJ_AS6K_Mg$ > > > drivers/soc/mediatek/mtk-mmsys.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/drivers/soc/mediatek/mtk-mmsys.c > b/drivers/soc/mediatek/mtk-mmsys.c > index 06d8e83a2cb5..38b36b881a3b 100644 > --- a/drivers/soc/mediatek/mtk-mmsys.c > +++ b/drivers/soc/mediatek/mtk-mmsys.c > @@ -57,6 +57,13 @@ static const struct mtk_mmsys_match_data > mt6779_mmsys_match_data = { > }, > }; > > +static const struct mtk_mmsys_driver_data mt6795_mmsys_driver_data = > { > + .clk_driver = "clk-mt6795-mm", > + .routes = mmsys_default_routing_table, mt6795 should have its own routing table instead of default one. The default one is used for mt8173, mt2701, mt2712 which no one knows how to separate them. If you don't know the routing table of mt6795, just left this as NULL. Regards, CK > + .num_routes = ARRAY_SIZE(mmsys_default_routing_table), > + .sw0_rst_offset = MT8183_MMSYS_SW0_RST_B, > +}; > + > static const struct mtk_mmsys_driver_data mt6797_mmsys_driver_data = > { > .clk_driver = "clk-mt6797-mm", > }; > @@ -363,6 +370,10 @@ static const struct of_device_id > of_match_mtk_mmsys[] = { > .compatible = "mediatek,mt6779-mmsys", > .data = &mt6779_mmsys_match_data, > }, > + { > + .compatible = "mediatek,mt6795-mmsys", > + .data = &mt6795_mmsys_driver_data, > + }, > { > .compatible = "mediatek,mt6797-mmsys", > .data = &mt6797_mmsys_match_data,
Il 16/05/22 07:43, CK Hu ha scritto: > Hi, Angelo: > > On Fri, 2022-05-13 at 19:03 +0200, AngeloGioacchino Del Regno wrote: >> Add MM support for the MT6795 SoC, using the mmsys default routing >> table. >> >> Signed-off-by: AngeloGioacchino Del Regno < >> angelogioacchino.delregno@collabora.com> >> --- >> >> In order for this patch to have any meaning and functionality, it is >> required to also have in-tree the [1] MT6795 clocks series, even >> though that's not required to actually compile this code. >> >> [1] >> https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/list/?series=641493__;!!CTRNKA9wMg0ARbw!ywDb_Gj4oV0iYHK_PbtJSNejzsJGlFVjX-1O0G1mR0vZX_5VeMtlZJ_AS6K_Mg$ >> >> >> drivers/soc/mediatek/mtk-mmsys.c | 11 +++++++++++ >> 1 file changed, 11 insertions(+) >> >> diff --git a/drivers/soc/mediatek/mtk-mmsys.c >> b/drivers/soc/mediatek/mtk-mmsys.c >> index 06d8e83a2cb5..38b36b881a3b 100644 >> --- a/drivers/soc/mediatek/mtk-mmsys.c >> +++ b/drivers/soc/mediatek/mtk-mmsys.c >> @@ -57,6 +57,13 @@ static const struct mtk_mmsys_match_data >> mt6779_mmsys_match_data = { >> }, >> }; >> >> +static const struct mtk_mmsys_driver_data mt6795_mmsys_driver_data = >> { >> + .clk_driver = "clk-mt6795-mm", >> + .routes = mmsys_default_routing_table, > > mt6795 should have its own routing table instead of default one. The > default one is used for mt8173, mt2701, mt2712 which no one knows how > to separate them. If you don't know the routing table of mt6795, just > left this as NULL. > Hello CK, I agree with you, in fact the first test that I've done was with leaving routes to NULL, but that did not work (I couldn't get the display to work), while assigning the default routing table resulted in having a working internal (DSI) display et al, which is why I have done that. I am sure that this may be a quirk that is required due to my platform's bootloader, but still, it won't work otherwise. If anyone from MediaTek wants to help with providing a better solution for that, you're welcome to - but otherwise, my proposal is to configure MT6795 with that default routing table and eventually come back to this later if any issue with this gets discovered... I couldn't find any, though. Cheers, Angelo
On Mon, 2022-05-16 at 10:44 +0200, AngeloGioacchino Del Regno wrote: > Il 16/05/22 07:43, CK Hu ha scritto: > > Hi, Angelo: > > > > On Fri, 2022-05-13 at 19:03 +0200, AngeloGioacchino Del Regno > > wrote: > > > Add MM support for the MT6795 SoC, using the mmsys default > > > routing > > > table. > > > > > > Signed-off-by: AngeloGioacchino Del Regno < > > > angelogioacchino.delregno@collabora.com> > > > --- > > > > > > In order for this patch to have any meaning and functionality, it > > > is > > > required to also have in-tree the [1] MT6795 clocks series, even > > > though that's not required to actually compile this code. > > > > > > [1] > > > https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/list/?series=641493__;!!CTRNKA9wMg0ARbw!ywDb_Gj4oV0iYHK_PbtJSNejzsJGlFVjX-1O0G1mR0vZX_5VeMtlZJ_AS6K_Mg$ > > > > > > > > > drivers/soc/mediatek/mtk-mmsys.c | 11 +++++++++++ > > > 1 file changed, 11 insertions(+) > > > > > > diff --git a/drivers/soc/mediatek/mtk-mmsys.c > > > b/drivers/soc/mediatek/mtk-mmsys.c > > > index 06d8e83a2cb5..38b36b881a3b 100644 > > > --- a/drivers/soc/mediatek/mtk-mmsys.c > > > +++ b/drivers/soc/mediatek/mtk-mmsys.c > > > @@ -57,6 +57,13 @@ static const struct mtk_mmsys_match_data > > > mt6779_mmsys_match_data = { > > > }, > > > }; > > > > > > +static const struct mtk_mmsys_driver_data > > > mt6795_mmsys_driver_data = > > > { > > > + .clk_driver = "clk-mt6795-mm", > > > + .routes = mmsys_default_routing_table, > > > > mt6795 should have its own routing table instead of default one. > > The > > default one is used for mt8173, mt2701, mt2712 which no one knows > > how > > to separate them. If you don't know the routing table of mt6795, > > just > > left this as NULL. > > > > Hello CK, > > I agree with you, in fact the first test that I've done was with > leaving > routes to NULL, but that did not work (I couldn't get the display to > work), > while assigning the default routing table resulted in having a > working > internal (DSI) display et al, which is why I have done that. > > I am sure that this may be a quirk that is required due to my > platform's > bootloader, but still, it won't work otherwise. > > If anyone from MediaTek wants to help with providing a better > solution for > that, you're welcome to - but otherwise, my proposal is to configure > MT6795 > with that default routing table and eventually come back to this > later if > any issue with this gets discovered... I couldn't find any, though. So you have a drm driver which support mt6795 and it would call mtk_mmsys_ddp_connect() to setup routing routing register. You could generate mt6795 routing table from default one by partial element that you use in mt6795. I think this table would be smaller than the default one. Regards, CK > > Cheers, > Angelo >
Il 16/05/22 11:50, CK Hu ha scritto: > On Mon, 2022-05-16 at 10:44 +0200, AngeloGioacchino Del Regno wrote: >> Il 16/05/22 07:43, CK Hu ha scritto: >>> Hi, Angelo: >>> >>> On Fri, 2022-05-13 at 19:03 +0200, AngeloGioacchino Del Regno >>> wrote: >>>> Add MM support for the MT6795 SoC, using the mmsys default >>>> routing >>>> table. >>>> >>>> Signed-off-by: AngeloGioacchino Del Regno < >>>> angelogioacchino.delregno@collabora.com> >>>> --- >>>> >>>> In order for this patch to have any meaning and functionality, it >>>> is >>>> required to also have in-tree the [1] MT6795 clocks series, even >>>> though that's not required to actually compile this code. >>>> >>>> [1] >>>> > https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/list/?series=641493__;!!CTRNKA9wMg0ARbw!ywDb_Gj4oV0iYHK_PbtJSNejzsJGlFVjX-1O0G1mR0vZX_5VeMtlZJ_AS6K_Mg$ >>>> >>>> >>>> drivers/soc/mediatek/mtk-mmsys.c | 11 +++++++++++ >>>> 1 file changed, 11 insertions(+) >>>> >>>> diff --git a/drivers/soc/mediatek/mtk-mmsys.c >>>> b/drivers/soc/mediatek/mtk-mmsys.c >>>> index 06d8e83a2cb5..38b36b881a3b 100644 >>>> --- a/drivers/soc/mediatek/mtk-mmsys.c >>>> +++ b/drivers/soc/mediatek/mtk-mmsys.c >>>> @@ -57,6 +57,13 @@ static const struct mtk_mmsys_match_data >>>> mt6779_mmsys_match_data = { >>>> }, >>>> }; >>>> >>>> +static const struct mtk_mmsys_driver_data >>>> mt6795_mmsys_driver_data = >>>> { >>>> + .clk_driver = "clk-mt6795-mm", >>>> + .routes = mmsys_default_routing_table, >>> >>> mt6795 should have its own routing table instead of default one. >>> The >>> default one is used for mt8173, mt2701, mt2712 which no one knows >>> how >>> to separate them. If you don't know the routing table of mt6795, >>> just >>> left this as NULL. >>> >> >> Hello CK, >> >> I agree with you, in fact the first test that I've done was with >> leaving >> routes to NULL, but that did not work (I couldn't get the display to >> work), >> while assigning the default routing table resulted in having a >> working >> internal (DSI) display et al, which is why I have done that. >> >> I am sure that this may be a quirk that is required due to my >> platform's >> bootloader, but still, it won't work otherwise. >> >> If anyone from MediaTek wants to help with providing a better >> solution for >> that, you're welcome to - but otherwise, my proposal is to configure >> MT6795 >> with that default routing table and eventually come back to this >> later if >> any issue with this gets discovered... I couldn't find any, though. > > So you have a drm driver which support mt6795 and it would call > mtk_mmsys_ddp_connect() to setup routing routing register. You could > generate mt6795 routing table from default one by partial element that > you use in mt6795. I think this table would be smaller than the default > one. > Okay, that makes a lot of sense: I'll try following this advice. Regards, Angelo
diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c index 06d8e83a2cb5..38b36b881a3b 100644 --- a/drivers/soc/mediatek/mtk-mmsys.c +++ b/drivers/soc/mediatek/mtk-mmsys.c @@ -57,6 +57,13 @@ static const struct mtk_mmsys_match_data mt6779_mmsys_match_data = { }, }; +static const struct mtk_mmsys_driver_data mt6795_mmsys_driver_data = { + .clk_driver = "clk-mt6795-mm", + .routes = mmsys_default_routing_table, + .num_routes = ARRAY_SIZE(mmsys_default_routing_table), + .sw0_rst_offset = MT8183_MMSYS_SW0_RST_B, +}; + static const struct mtk_mmsys_driver_data mt6797_mmsys_driver_data = { .clk_driver = "clk-mt6797-mm", }; @@ -363,6 +370,10 @@ static const struct of_device_id of_match_mtk_mmsys[] = { .compatible = "mediatek,mt6779-mmsys", .data = &mt6779_mmsys_match_data, }, + { + .compatible = "mediatek,mt6795-mmsys", + .data = &mt6795_mmsys_driver_data, + }, { .compatible = "mediatek,mt6797-mmsys", .data = &mt6797_mmsys_match_data,
Add MM support for the MT6795 SoC, using the mmsys default routing table. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- In order for this patch to have any meaning and functionality, it is required to also have in-tree the [1] MT6795 clocks series, even though that's not required to actually compile this code. [1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=641493 drivers/soc/mediatek/mtk-mmsys.c | 11 +++++++++++ 1 file changed, 11 insertions(+)