From patchwork Wed May 18 09:36:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 12853447 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 77B1AC433EF for ; Wed, 18 May 2022 09:40:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=53vG26DDibc5FugxYz9An1Cyk8zsAZZmjfgE2ZudGNM=; b=IVdtDVjLanwKaj FRskfyYW6GBly7Km2t/HzmKfigKa2XY6/xcIz4SCL0FaD57S0YCnMoZy9x8Z3ff5EfiU9cEmehhdQ FUI9UGCQfPedMRLhjXNVd8M5Ijlta1hs/ARirIU9lUp8n7UEkJkxmxmnJDhdh3MyCKJQqwx3gnTf7 b6ndOUEFwNNIdn9PwlDoENzCyXArS+1GYG5mr+k+guvd0UpdM3AYyMsgBcFxe4A7qW1wMieNm91Fx 2pphwSKuLVprsnPk5W9NQBxjiu0ksCMkUBkfl6gMm4Cq43nl/mJhRtz0+Yykxm7tLTiDShzGGFA6z K6PzrLSz9x1MMsUfbf9A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nrGA0-0016Uf-5K; Wed, 18 May 2022 09:40:04 +0000 Received: from bhuna.collabora.co.uk ([46.235.227.227]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nrG6j-0014Xp-Jw; Wed, 18 May 2022 09:36:43 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: kholk11) with ESMTPSA id 9F62B1F44CD6 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1652866600; bh=3zGUrHnz1dbJuRpvdm88S9uEAq5/aWCIicZit1vC+BA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LaCL5F1tfcIElDLgjDjcgsw7cNvWuPXJkqbuuvQkfd8nnzshg8wU1T83zZky1NNPL tu3GzqDQBn0D0Wbs3FjzSI7/kLq7M8fdIz2VRhIKDsT7ddZ2kQkqUj8a3xlY88T/xP pgLzQoT4ZRXMeIlbFZt4nx6YgQxOC28LdD9O1jOOzEIGuN+l3ZD1ADq9dB91ik6PSl O04u0/w9uK+TwbfZieze3jhWx5xGmThBlDsDAT2UJ53R4n4Xk3h7HEFcVkXq/+wNFP O6L1ueQkSaHYswULIRQX2L7UoM5d+oXYnwDoYWOBAPSPy5M6Hw3zFiDZAsVS4102Hb FTwnhYEkdzD9w== From: AngeloGioacchino Del Regno To: robh+dt@kernel.org Cc: krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, sboyd@kernel.org, chun-jie.chen@mediatek.com, rex-bc.chen@mediatek.com, wenst@chromium.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, krzysztof.kozlowski@linaro.org Subject: [PATCH v2 2/2] dt-bindings: arm: mtk-clocks: Set #clock-cells as required property Date: Wed, 18 May 2022 11:36:31 +0200 Message-Id: <20220518093631.25491-3-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220518093631.25491-1-angelogioacchino.delregno@collabora.com> References: <20220518093631.25491-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220518_023641_882093_50D22CEB X-CRM114-Status: UNSURE ( 8.23 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org This is a clock-controller binding, so it needs #clock-cells, or it would be of no use: add that to the list of required properties. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Matthias Brugger Reviewed-by: Krzysztof Kozlowski Acked-by: Rob Herring --- .../devicetree/bindings/arm/mediatek/mediatek,mt8186-clock.yaml | 1 + .../bindings/arm/mediatek/mediatek,mt8186-sys-clock.yaml | 1 + .../devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml | 1 + .../bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml | 1 + .../devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.yaml | 1 + .../bindings/arm/mediatek/mediatek,mt8195-sys-clock.yaml | 1 + 6 files changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-clock.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-clock.yaml index 371eace6780b..70d7b393140e 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-clock.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-clock.yaml @@ -44,6 +44,7 @@ properties: required: - compatible - reg + - '#clock-cells' additionalProperties: false diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-sys-clock.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-sys-clock.yaml index 0886e2e335bb..48ebd2112789 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-sys-clock.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-sys-clock.yaml @@ -42,6 +42,7 @@ properties: required: - compatible - reg + - '#clock-cells' additionalProperties: false diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml index bb410b178f33..b61d7635dfdd 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml @@ -46,6 +46,7 @@ properties: required: - compatible - reg + - '#clock-cells' additionalProperties: false diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml index 27f79175c678..580450e94c02 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml @@ -35,6 +35,7 @@ properties: required: - compatible - reg + - '#clock-cells' additionalProperties: false diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.yaml index 0189aa0e34d4..aabd9f0df2de 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.yaml @@ -60,6 +60,7 @@ properties: required: - compatible - reg + - '#clock-cells' additionalProperties: false diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-sys-clock.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-sys-clock.yaml index 95b6bdf99936..e2ba37830d4e 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-sys-clock.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-sys-clock.yaml @@ -43,6 +43,7 @@ properties: required: - compatible - reg + - '#clock-cells' additionalProperties: false