@@ -816,8 +816,13 @@ usb_host0: usb@11270000 {
reg-names = "mac";
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_LOW>;
power-domains = <&scpsys MT2712_POWER_DOMAIN_USB>;
- clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
- clock-names = "sys_ck", "ref_ck";
+ clocks = <&topckgen CLK_TOP_USB30_SEL>,
+ <&clk26m>,
+ <&clk26m>,
+ <&clk26m>,
+ <&clk26m>;
+ clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck",
+ "xhci_ck";
status = "disabled";
};
};
@@ -880,8 +885,13 @@ usb_host1: usb@112c0000 {
reg-names = "mac";
interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_LOW>;
power-domains = <&scpsys MT2712_POWER_DOMAIN_USB2>;
- clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
- clock-names = "sys_ck", "ref_ck";
+ clocks = <&topckgen CLK_TOP_USB30_SEL>,
+ <&clk26m>,
+ <&clk26m>,
+ <&clk26m>,
+ <&clk26m>;
+ clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck",
+ "xhci_ck";
status = "disabled";
};
};
@@ -752,8 +752,9 @@ ssusb: usb@1a0c0000 {
clocks = <&ssusbsys CLK_SSUSB_SYS_EN>,
<&ssusbsys CLK_SSUSB_REF_EN>,
<&ssusbsys CLK_SSUSB_MCU_EN>,
- <&ssusbsys CLK_SSUSB_DMA_EN>;
- clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck";
+ <&ssusbsys CLK_SSUSB_DMA_EN>,
+ <&clk25m>;
+ clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck", "xhci_ck";
phys = <&u2port0 PHY_TYPE_USB2>,
<&u3port0 PHY_TYPE_USB3>,
<&u2port1 PHY_TYPE_USB2>;
@@ -943,8 +943,13 @@ usb_host: usb@11270000 {
reg-names = "mac";
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
power-domains = <&spm MT8173_POWER_DOMAIN_USB>;
- clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
- clock-names = "sys_ck", "ref_ck";
+ clocks = <&topckgen CLK_TOP_USB30_SEL>,
+ <&clk26m>,
+ <&clk26m>,
+ <&clk26m>,
+ <&clk26m>;
+ clock-names = "sys_ck", "ref_ck", "mcu_ck",
+ "dma_ck", "xhci_ck";
status = "disabled";
};
};
@@ -1471,8 +1471,12 @@ usb_host: usb@11200000 {
reg-names = "mac";
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_LOW>;
clocks = <&infracfg CLK_INFRA_UNIPRO_SCK>,
- <&infracfg CLK_INFRA_USB>;
- clock-names = "sys_ck", "ref_ck";
+ <&infracfg CLK_INFRA_USB>,
+ <&clk26m>,
+ <&clk26m>,
+ <&clk26m>;
+ clock-names = "sys_ck", "ref_ck", "mcu_ck",
+ "dma_ck", "xhci_ck";
status = "disabled";
};
};
@@ -723,9 +723,12 @@ xhci: usb@11200000 {
assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>,
<&topckgen CLK_TOP_UNIVPLL_D5_D4>;
clocks = <&infracfg CLK_INFRA_SSUSB>,
- <&infracfg CLK_INFRA_SSUSB_XHCI>,
- <&apmixedsys CLK_APMIXED_USBPLL>;
- clock-names = "sys_ck", "xhci_ck", "ref_ck";
+ <&apmixedsys CLK_APMIXED_USBPLL>,
+ <&clk26m>,
+ <&clk26m>,
+ <&infracfg CLK_INFRA_SSUSB_XHCI>;
+ clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck",
+ "xhci_ck";
wakeup-source;
mediatek,syscon-wakeup = <&pericfg 0x420 102>;
status = "disabled";
@@ -571,8 +571,10 @@ xhci0: usb@11200000 {
clocks = <&infracfg_ao CLK_INFRA_AO_SSUSB>,
<&topckgen CLK_TOP_SSUSB_REF>,
<&apmixedsys CLK_APMIXED_USB1PLL>,
+ <&clk26m>,
<&infracfg_ao CLK_INFRA_AO_SSUSB_XHCI>;
- clock-names = "sys_ck", "ref_ck", "mcu_ck", "xhci_ck";
+ clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck",
+ "xhci_ck";
mediatek,syscon-wakeup = <&pericfg 0x400 103>;
wakeup-source;
status = "disabled";
@@ -636,8 +638,10 @@ xhci1: usb@11290000 {
clocks = <&pericfg_ao CLK_PERI_AO_SSUSB_1P_BUS>,
<&topckgen CLK_TOP_SSUSB_P1_REF>,
<&apmixedsys CLK_APMIXED_USB1PLL>,
+ <&clk26m>,
<&pericfg_ao CLK_PERI_AO_SSUSB_1P_XHCI>;
- clock-names = "sys_ck", "ref_ck", "mcu_ck","xhci_ck";
+ clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck",
+ "xhci_ck";
mediatek,syscon-wakeup = <&pericfg 0x400 104>;
wakeup-source;
status = "disabled";
@@ -657,8 +661,11 @@ xhci2: usb@112a0000 {
<&topckgen CLK_TOP_UNIVPLL_D5_D4>;
clocks = <&pericfg_ao CLK_PERI_AO_SSUSB_2P_BUS>,
<&topckgen CLK_TOP_SSUSB_P2_REF>,
+ <&clk26m>,
+ <&clk26m>,
<&pericfg_ao CLK_PERI_AO_SSUSB_2P_XHCI>;
- clock-names = "sys_ck", "ref_ck", "xhci_ck";
+ clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck",
+ "xhci_ck";
mediatek,syscon-wakeup = <&pericfg 0x400 105>;
wakeup-source;
status = "disabled";
@@ -678,8 +685,11 @@ xhci3: usb@112b0000 {
<&topckgen CLK_TOP_UNIVPLL_D5_D4>;
clocks = <&pericfg_ao CLK_PERI_AO_SSUSB_3P_BUS>,
<&topckgen CLK_TOP_SSUSB_P3_REF>,
+ <&clk26m>,
+ <&clk26m>,
<&pericfg_ao CLK_PERI_AO_SSUSB_3P_XHCI>;
- clock-names = "sys_ck", "ref_ck", "xhci_ck";
+ clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck",
+ "xhci_ck";
mediatek,syscon-wakeup = <&pericfg 0x400 106>;
wakeup-source;
status = "disabled";
The XHCI controller hardware always has all clocks wired, however depending on the SoC, some of them might be fixed (ie not controllable). These fixed clocks were previously omitted from the devicetree entirely. In order to better describe the hardware on the devicetree, and to have a fixed order of clocks for all SoCs, add the missing non-controllable clocks as phandles to a fixed-clock node. By keeping a fixed clock order, this gets rid of dtbs_check warnings on mt8192 and mt8195. Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> --- Changes in v2: - Instead of simply reordering the clocks on mt8192, added missing fixed clocks for all arm64 dts - Rewrote commit message and title arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 18 ++++++++++++++---- arch/arm64/boot/dts/mediatek/mt7622.dtsi | 5 +++-- arch/arm64/boot/dts/mediatek/mt8173.dtsi | 9 +++++++-- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 8 ++++++-- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 9 ++++++--- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 18 ++++++++++++++---- 6 files changed, 50 insertions(+), 17 deletions(-)