| Message ID | 20220728071637.22364-2-peter.wang@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | ufs: allow vendor disable wb toggle in clock scaling | expand |
On Thu, 2022-07-28 at 15:16 +0800, peter.wang@mediatek.com wrote: > From: Peter Wang <peter.wang@mediatek.com> > > Vendor may wan't disable/enable write booster while clock scaling. > Introduce a flag UFSHCD_CAP_WB_WITH_CLK_SCALING to decouple WB and > clock scaling. > > UFSHCD_CAP_WB_WITH_CLK_SCALING only valid when UFSHCD_CAP_CLK_SCALING > is set. Just like UFSHCD_CAP_HIBERN8_WITH_CLK_GATING is valid only > when > UFSHCD_CAP_CLK_GATING set. > Hi Peter, probably "interduce" is a typo in your subject? Kind regards, Bean
On 7/29/22 5:41 AM, Bean Huo wrote: > On Thu, 2022-07-28 at 15:16 +0800, peter.wang@mediatek.com wrote: >> From: Peter Wang <peter.wang@mediatek.com> >> >> Vendor may wan't disable/enable write booster while clock scaling. >> Introduce a flag UFSHCD_CAP_WB_WITH_CLK_SCALING to decouple WB and >> clock scaling. >> >> UFSHCD_CAP_WB_WITH_CLK_SCALING only valid when UFSHCD_CAP_CLK_SCALING >> is set. Just like UFSHCD_CAP_HIBERN8_WITH_CLK_GATING is valid only >> when >> UFSHCD_CAP_CLK_GATING set. >> > Hi Peter, > > probably "interduce" is a typo in your subject? > > Kind regards, > Bean Hi Bean, Yes, it typo. Thanks. Peter
diff --git a/drivers/ufs/core/ufs-sysfs.c b/drivers/ufs/core/ufs-sysfs.c index 0a088b47d557..8fa1679ffd1a 100644 --- a/drivers/ufs/core/ufs-sysfs.c +++ b/drivers/ufs/core/ufs-sysfs.c @@ -225,7 +225,8 @@ static ssize_t wb_on_store(struct device *dev, struct device_attribute *attr, unsigned int wb_enable; ssize_t res; - if (!ufshcd_is_wb_allowed(hba) || ufshcd_is_clkscaling_supported(hba)) { + if (!ufshcd_is_wb_allowed(hba) || (ufshcd_is_clkscaling_supported(hba) + && ufshcd_can_wb_during_scaling(hba))) { /* * If the platform supports UFSHCD_CAP_CLK_SCALING, turn WB * on/off will be done while clock scaling up/down. diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c index c7b337480e3e..5d1f2ff0f596 100644 --- a/drivers/ufs/core/ufshcd.c +++ b/drivers/ufs/core/ufshcd.c @@ -1301,9 +1301,11 @@ static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up) } /* Enable Write Booster if we have scaled up else disable it */ - downgrade_write(&hba->clk_scaling_lock); - is_writelock = false; - ufshcd_wb_toggle(hba, scale_up); + if (ufshcd_can_wb_during_scaling(hba)) { + downgrade_write(&hba->clk_scaling_lock); + is_writelock = false; + ufshcd_wb_toggle(hba, scale_up); + } out_unprepare: ufshcd_clock_scaling_unprepare(hba, is_writelock); diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h index a92271421718..4bd35d68acde 100644 --- a/include/ufs/ufshcd.h +++ b/include/ufs/ufshcd.h @@ -648,6 +648,9 @@ enum ufshcd_caps { * notification if it is supported by the UFS device. */ UFSHCD_CAP_TEMP_NOTIF = 1 << 11, + + /* Allow WB with clk scaling */ + UFSHCD_CAP_WB_WITH_CLK_SCALING = 1 << 12, }; struct ufs_hba_variant_params { @@ -1004,6 +1007,10 @@ static inline bool ufshcd_is_wb_allowed(struct ufs_hba *hba) { return hba->caps & UFSHCD_CAP_WB_EN; } +static inline bool ufshcd_can_wb_during_scaling(struct ufs_hba *hba) +{ + return hba->caps & UFSHCD_CAP_WB_WITH_CLK_SCALING; +} #define ufshcd_writel(hba, val, reg) \ writel((val), (hba)->mmio_base + (reg))