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Mon, 19 Sep 2022 10:03:59 -0700 (PDT) Received: from localhost.localdomain ([95.183.227.98]) by smtp.gmail.com with ESMTPSA id ci10-20020a5d5d8a000000b0021e6c52c921sm17562487wrb.54.2022.09.19.10.03.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Sep 2022 10:03:59 -0700 (PDT) From: Yassine Oudjana X-Google-Original-From: Yassine Oudjana To: Linus Walleij , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , Sean Wang , Andy Teng , AngeloGioacchino Del Regno Cc: Yassine Oudjana , Yassine Oudjana , linux-mediatek@lists.infradead.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/4] dt-bindings: pinctrl: mediatek,mt67xx-pinctrl: Document MT6735 pin controller bindings Date: Mon, 19 Sep 2022 20:01:14 +0300 Message-Id: <20220919170115.94873-4-y.oudjana@protonmail.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220919170115.94873-1-y.oudjana@protonmail.com> References: <20220919170115.94873-1-y.oudjana@protonmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220919_100400_096764_2FC5E4F1 X-CRM114-Status: GOOD ( 13.31 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: Yassine Oudjana Add bindings for the pin controller found on MediaTek MT6735 and MT6735M SoCs, including describing a method to manually specify a pin and function in the pinmux property making defining bindings for each pin/function combination unnecessary. The pin controllers on those SoCs are generally identical, with the only difference being the lack of MSDC2 pins (198-203) on MT6735M. Signed-off-by: Yassine Oudjana --- .../pinctrl/mediatek,mt67xx-pinctrl.yaml | 41 +++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt67xx-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt67xx-pinctrl.yaml index 1a1a03cede3c..c5b4972caa77 100644 --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt67xx-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt67xx-pinctrl.yaml @@ -20,6 +20,8 @@ properties: compatible: oneOf: - enum: + - mediatek,mt6735-pinctrl + - mediatek,mt6735m-pinctrl - mediatek,mt6765-pinctrl - mediatek,mt6795-pinctrl - mediatek,mt6797-pinctrl @@ -63,6 +65,29 @@ required: allOf: - $ref: "pinctrl.yaml#" + - if: + properties: + compatible: + contains: + enum: + - mediatek,mt6735-pinctrl + - mediatek,mt6735m-pinctrl + then: + properties: + reg: + minItems: 8 + maxItems: 8 + + reg-names: + items: + - const: gpio + - const: iocfg0 + - const: iocfg1 + - const: iocfg2 + - const: iocfg3 + - const: iocfg4 + - const: iocfg5 + - const: eint - if: properties: compatible: @@ -180,6 +205,22 @@ patternProperties: }; }; }; + The MTK_PIN_NO macro can also be used to select a pin and specify + a function index: + pincontroller { + /* Pin 19 set to function 0 (multifunction GPIO) */ + gpio-pins { + pins { + pinmux = <(MTK_PIN_NO(19) | 0)>; + }; + }; + /* Pin 172 set to function 1 (primary function) */ + msdc1-pins { + pins-cmd { + pinmux = <(MTK_PIN_NO(172) | 1)>; + }; + }; + }; $ref: "pinmux-node.yaml" properties: