From patchwork Thu Sep 22 09:18:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miles Chen X-Patchwork-Id: 12984842 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4C55AC6FA82 for ; Thu, 22 Sep 2022 09:55:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:CC:To:From:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=x2GiyK6IcozFbjkT8ATH6a9wHA8C++g35rq7EPXtHJo=; b=aTVw8xEuuf0jDhJLFZt90csokC mnj9pKI1Uppn7aB0NsmrLOxM9igdAZRis2485feNdddlje3WmWTUZFNwZ6P6V3e+ekDVUScPTMyQi Wzi5YqXql4cIygsi9sR1kzbqU2DoHVqPdOOjrmxTExUN/v3inBmVOv++2Jt1CUUA6kC60TcOR9Wli S+c8TNJX/r0gdoLR6eXEwpoAEVPsvQZI3xou7rYlIXb/u1uATfiFtyeuPdnFOxC9aMMPveoGJ4kYW EuUfMYqGDiLvQsVIZjX9mfJ0iwDybnbom+sVO+k8YBggAxVYQRuCgDzQaGYE+WibCMSTptyF+rAux 5zA3RCdA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1obIvP-00EbGU-66; Thu, 22 Sep 2022 09:55:19 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1obIWW-00ESav-Rr; Thu, 22 Sep 2022 09:29:38 +0000 X-UUID: 27b70f5423e440dab2a7f7d3484873b4-20220922 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=x2GiyK6IcozFbjkT8ATH6a9wHA8C++g35rq7EPXtHJo=; b=rY/XbYX8W0rPQU++Vxeq5Hzb4LfC0Jxex46bi85EmXqbfQHdhpoft0NA8FQrZ1k0JskpyUNMJNrwgcSj4IZR5nLV1FP/OJDhQ6wR6znbR+kPXMreX5Bwj0bITbX/J5F+6lW5BhWmEUmZ8cALQjPsazFowa/I86h0te+5qKUmobw=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.11,REQID:1f055de9-a5b6-4a97-b1ad-e7a680e4daeb,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:39a5ff1,CLOUDID:3910ac06-1cee-4c38-b21b-a45f9682fdc0,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: 27b70f5423e440dab2a7f7d3484873b4-20220922 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1332466184; Thu, 22 Sep 2022 02:29:32 -0700 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Thu, 22 Sep 2022 17:18:55 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 22 Sep 2022 17:18:55 +0800 From: Miles Chen To: Stephen Boyd , Michael Turquette , Matthias Brugger CC: , AngeloGioacchino Del Regno , Chen-Yu Tsai , Chun-Jie Chen , Miles Chen , , , Subject: [PATCH 2/7] clk: mediatek: mt2712: use mtk_clk_simple_probe to simplify driver Date: Thu, 22 Sep 2022 17:18:30 +0800 Message-ID: <20220922091841.4099-3-miles.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220922091841.4099-1-miles.chen@mediatek.com> References: <20220922091841.4099-1-miles.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220922_022936_973239_5BB6AF4D X-CRM114-Status: GOOD ( 14.59 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org mtk_clk_simple_probe was added by Chun-Jie to simply common flow of MediaTek clock drivers and ChenYu enhanced the error path of mtk_clk_simple_probe and added mtk_clk_simple_remove. Let's use mtk_clk_simple_probe and mtk_clk_simple_probe in other MediaTek clock drivers as well. Signed-off-by: Miles Chen Reviewed-by: AngeloGioacchino Del Regno --- drivers/clk/mediatek/clk-mt2712-bdp.c | 34 +++++++++--------------- drivers/clk/mediatek/clk-mt2712-img.c | 34 +++++++++--------------- drivers/clk/mediatek/clk-mt2712-jpgdec.c | 34 +++++++++--------------- drivers/clk/mediatek/clk-mt2712-mfg.c | 34 +++++++++--------------- drivers/clk/mediatek/clk-mt2712-vdec.c | 34 +++++++++--------------- drivers/clk/mediatek/clk-mt2712-venc.c | 34 +++++++++--------------- 6 files changed, 72 insertions(+), 132 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt2712-bdp.c b/drivers/clk/mediatek/clk-mt2712-bdp.c index 9acab4357133..684d03e9f6de 100644 --- a/drivers/clk/mediatek/clk-mt2712-bdp.c +++ b/drivers/clk/mediatek/clk-mt2712-bdp.c @@ -58,33 +58,23 @@ static const struct mtk_gate bdp_clks[] = { GATE_BDP(CLK_BDP_TVD_CBUS, "bdp_tvd_cbus", "mm_sel", 30), }; -static int clk_mt2712_bdp_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - int r; - struct device_node *node = pdev->dev.of_node; - - clk_data = mtk_alloc_clk_data(CLK_BDP_NR_CLK); - - mtk_clk_register_gates(node, bdp_clks, ARRAY_SIZE(bdp_clks), - clk_data); - - r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - - if (r != 0) - pr_err("%s(): could not register clock provider: %d\n", - __func__, r); - - return r; -} +static const struct mtk_clk_desc bdp_desc = { + .clks = bdp_clks, + .num_clks = ARRAY_SIZE(bdp_clks), +}; static const struct of_device_id of_match_clk_mt2712_bdp[] = { - { .compatible = "mediatek,mt2712-bdpsys", }, - {} + { + .compatible = "mediatek,mt2712-bdpsys", + .data = &bdp_desc, + }, { + /* sentinel */ + } }; static struct platform_driver clk_mt2712_bdp_drv = { - .probe = clk_mt2712_bdp_probe, + .probe = mtk_clk_simple_probe, + .remove = mtk_clk_simple_remove, .driver = { .name = "clk-mt2712-bdp", .of_match_table = of_match_clk_mt2712_bdp, diff --git a/drivers/clk/mediatek/clk-mt2712-img.c b/drivers/clk/mediatek/clk-mt2712-img.c index 5cc143e65e42..335049cdc856 100644 --- a/drivers/clk/mediatek/clk-mt2712-img.c +++ b/drivers/clk/mediatek/clk-mt2712-img.c @@ -36,33 +36,23 @@ static const struct mtk_gate img_clks[] = { GATE_IMG(CLK_IMG_CAM_SV2_EN, "img_cam_sv2_en", "mm_sel", 11), }; -static int clk_mt2712_img_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - int r; - struct device_node *node = pdev->dev.of_node; - - clk_data = mtk_alloc_clk_data(CLK_IMG_NR_CLK); - - mtk_clk_register_gates(node, img_clks, ARRAY_SIZE(img_clks), - clk_data); - - r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - - if (r != 0) - pr_err("%s(): could not register clock provider: %d\n", - __func__, r); - - return r; -} +static const struct mtk_clk_desc img_desc = { + .clks = img_clks, + .num_clks = ARRAY_SIZE(img_clks), +}; static const struct of_device_id of_match_clk_mt2712_img[] = { - { .compatible = "mediatek,mt2712-imgsys", }, - {} + { + .compatible = "mediatek,mt2712-imgsys", + .data = &img_desc, + }, { + /* sentinel */ + } }; static struct platform_driver clk_mt2712_img_drv = { - .probe = clk_mt2712_img_probe, + .probe = mtk_clk_simple_probe, + .remove = mtk_clk_simple_remove, .driver = { .name = "clk-mt2712-img", .of_match_table = of_match_clk_mt2712_img, diff --git a/drivers/clk/mediatek/clk-mt2712-jpgdec.c b/drivers/clk/mediatek/clk-mt2712-jpgdec.c index 31fc30370d98..07ba7c5e80af 100644 --- a/drivers/clk/mediatek/clk-mt2712-jpgdec.c +++ b/drivers/clk/mediatek/clk-mt2712-jpgdec.c @@ -32,33 +32,23 @@ static const struct mtk_gate jpgdec_clks[] = { GATE_JPGDEC(CLK_JPGDEC_JPGDEC, "jpgdec_jpgdec", "jpgdec_sel", 4), }; -static int clk_mt2712_jpgdec_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - int r; - struct device_node *node = pdev->dev.of_node; - - clk_data = mtk_alloc_clk_data(CLK_JPGDEC_NR_CLK); - - mtk_clk_register_gates(node, jpgdec_clks, ARRAY_SIZE(jpgdec_clks), - clk_data); - - r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - - if (r != 0) - pr_err("%s(): could not register clock provider: %d\n", - __func__, r); - - return r; -} +static const struct mtk_clk_desc jpgdec_desc = { + .clks = jpgdec_clks, + .num_clks = ARRAY_SIZE(jpgdec_clks), +}; static const struct of_device_id of_match_clk_mt2712_jpgdec[] = { - { .compatible = "mediatek,mt2712-jpgdecsys", }, - {} + { + .compatible = "mediatek,mt2712-jpgdecsys", + .data = &jpgdec_desc, + }, { + /* sentinel */ + } }; static struct platform_driver clk_mt2712_jpgdec_drv = { - .probe = clk_mt2712_jpgdec_probe, + .probe = mtk_clk_simple_probe, + .remove = mtk_clk_simple_remove, .driver = { .name = "clk-mt2712-jpgdec", .of_match_table = of_match_clk_mt2712_jpgdec, diff --git a/drivers/clk/mediatek/clk-mt2712-mfg.c b/drivers/clk/mediatek/clk-mt2712-mfg.c index a4d09675bf18..42f8cf3ecf4c 100644 --- a/drivers/clk/mediatek/clk-mt2712-mfg.c +++ b/drivers/clk/mediatek/clk-mt2712-mfg.c @@ -31,33 +31,23 @@ static const struct mtk_gate mfg_clks[] = { GATE_MFG(CLK_MFG_BG3D, "mfg_bg3d", "mfg_sel", 0), }; -static int clk_mt2712_mfg_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - int r; - struct device_node *node = pdev->dev.of_node; - - clk_data = mtk_alloc_clk_data(CLK_MFG_NR_CLK); - - mtk_clk_register_gates(node, mfg_clks, ARRAY_SIZE(mfg_clks), - clk_data); - - r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - - if (r != 0) - pr_err("%s(): could not register clock provider: %d\n", - __func__, r); - - return r; -} +static const struct mtk_clk_desc mfg_desc = { + .clks = mfg_clks, + .num_clks = ARRAY_SIZE(mfg_clks), +}; static const struct of_device_id of_match_clk_mt2712_mfg[] = { - { .compatible = "mediatek,mt2712-mfgcfg", }, - {} + { + .compatible = "mediatek,mt2712-mfgcfg", + .data = &mfg_desc, + }, { + /* sentinel */ + } }; static struct platform_driver clk_mt2712_mfg_drv = { - .probe = clk_mt2712_mfg_probe, + .probe = mtk_clk_simple_probe, + .remove = mtk_clk_simple_remove, .driver = { .name = "clk-mt2712-mfg", .of_match_table = of_match_clk_mt2712_mfg, diff --git a/drivers/clk/mediatek/clk-mt2712-vdec.c b/drivers/clk/mediatek/clk-mt2712-vdec.c index af13f43dd831..6296ed5c5b55 100644 --- a/drivers/clk/mediatek/clk-mt2712-vdec.c +++ b/drivers/clk/mediatek/clk-mt2712-vdec.c @@ -50,33 +50,23 @@ static const struct mtk_gate vdec_clks[] = { GATE_VDEC1(CLK_VDEC_IMGRZ_CKEN, "vdec_imgrz_cken", "vdec_sel", 1), }; -static int clk_mt2712_vdec_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - int r; - struct device_node *node = pdev->dev.of_node; - - clk_data = mtk_alloc_clk_data(CLK_VDEC_NR_CLK); - - mtk_clk_register_gates(node, vdec_clks, ARRAY_SIZE(vdec_clks), - clk_data); - - r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - - if (r != 0) - pr_err("%s(): could not register clock provider: %d\n", - __func__, r); - - return r; -} +static const struct mtk_clk_desc vdec_desc = { + .clks = vdec_clks, + .num_clks = ARRAY_SIZE(vdec_clks), +}; static const struct of_device_id of_match_clk_mt2712_vdec[] = { - { .compatible = "mediatek,mt2712-vdecsys", }, - {} + { + .compatible = "mediatek,mt2712-vdecsys", + .data = &vdec_desc, + }, { + /* sentinel */ + } }; static struct platform_driver clk_mt2712_vdec_drv = { - .probe = clk_mt2712_vdec_probe, + .probe = mtk_clk_simple_probe, + .remove = mtk_clk_simple_remove, .driver = { .name = "clk-mt2712-vdec", .of_match_table = of_match_clk_mt2712_vdec, diff --git a/drivers/clk/mediatek/clk-mt2712-venc.c b/drivers/clk/mediatek/clk-mt2712-venc.c index abc08a029753..b9bfc35de629 100644 --- a/drivers/clk/mediatek/clk-mt2712-venc.c +++ b/drivers/clk/mediatek/clk-mt2712-venc.c @@ -33,33 +33,23 @@ static const struct mtk_gate venc_clks[] = { GATE_VENC(CLK_VENC_SMI_LARB6, "venc_smi_larb6", "jpgdec_sel", 12), }; -static int clk_mt2712_venc_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - int r; - struct device_node *node = pdev->dev.of_node; - - clk_data = mtk_alloc_clk_data(CLK_VENC_NR_CLK); - - mtk_clk_register_gates(node, venc_clks, ARRAY_SIZE(venc_clks), - clk_data); - - r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - - if (r != 0) - pr_err("%s(): could not register clock provider: %d\n", - __func__, r); - - return r; -} +static const struct mtk_clk_desc venc_desc = { + .clks = venc_clks, + .num_clks = ARRAY_SIZE(venc_clks), +}; static const struct of_device_id of_match_clk_mt2712_venc[] = { - { .compatible = "mediatek,mt2712-vencsys", }, - {} + { + .compatible = "mediatek,mt2712-vencsys", + .data = &venc_desc, + }, { + /* sentinel */ + } }; static struct platform_driver clk_mt2712_venc_drv = { - .probe = clk_mt2712_venc_probe, + .probe = mtk_clk_simple_probe, + .remove = mtk_clk_simple_remove, .driver = { .name = "clk-mt2712-venc", .of_match_table = of_match_clk_mt2712_venc,