From patchwork Thu Oct 6 21:25:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 13000732 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F4198C433F5 for ; Thu, 6 Oct 2022 21:26:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=+ZXVmcvrspe4gs6IvIxHDPmW7xaixcvEJUQ4OeLnEME=; b=X5PrG+tz3JHTBxqtr1neDxWyd7 nwTjfP+NqwMkxebkosSqusMNvw0gGCo0YhkNrX98w/GaF+h9dQXQg5wUYApU9Ig1IQNH4OV9OfYIO BYx76hYThTU19VAndpwrH4UjBk2GBqDCMu9jyevxpoXoS0yWgze7yo6JznMYYdCZadK06G8LG9OIY LaXA2V7m2O52VzH4VIMAFF3SxrUbejJplJ4qWk1o5WEHVxjnT6BQ5DQ3dV6DZOnWsajznXLPwS43E MFC1o4ro1eBOLauxz1iIMJkBVJtczmdk+FYiLduLrK1drmXa5V3Xag8VZz7ETL/yzDKQbsKOcoPpS cPUTpMYA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ogYNd-005MXS-LD; Thu, 06 Oct 2022 21:26:09 +0000 Received: from madras.collabora.co.uk ([2a00:1098:0:82:1000:25:2eeb:e5ab]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1ogYN7-005MJ5-Mr; Thu, 06 Oct 2022 21:25:39 +0000 Received: from notapiano.myfiosgateway.com (unknown [IPv6:2600:4041:5b1a:cd00:524d:e95d:1a9c:492a]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id 43B1F6602315; Thu, 6 Oct 2022 22:25:35 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1665091536; bh=G8nm/nR1H1cInj6GeXU+i9brDXiOkH96KSJVMB1aK08=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oeA/leyVaazoZ4TNaJlrJXFjfZf4avkodJMN+bDzDFEbwj9d2+1FodkkUbFsrdtbD 5AWlCPpo/fv3he4TYJZ1LtNZk+hWROaVrJoM2IXxw/WsSgU5aZ/ygj6qE3fLqGDsU2 BtcMsTk+Fl1j9QkCzKi1zT8iep/lMzikgHEN9ti6C+iLwdjg89W0Ka398sMknlqwMR KfBZmPQzHXo0C5q6sxiNoyf3a17Wb1GIAl/OfS37rksiFRX4WPtAbZT+CAsImiHH+H qEyOOTPuj2ep3Y2l17XwqMR80PWNrAP2Rd3xr4VCqVGe15ZpBUegyASWYepKhdIaMz p2RYtSHWplFuA== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Matthias Brugger Cc: kernel@collabora.com, Chen-Yu Tsai , AngeloGioacchino Del Regno , =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 2/5] arm64: dts: mediatek: asurada: Add display backlight Date: Thu, 6 Oct 2022 17:25:25 -0400 Message-Id: <20221006212528.103790-3-nfraprado@collabora.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221006212528.103790-1-nfraprado@collabora.com> References: <20221006212528.103790-1-nfraprado@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221006_142537_911696_A4CF4292 X-CRM114-Status: GOOD ( 10.18 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Add the display backlight for the Asurada platform. It relies on the display PWM controller, so also enable and configure this component. Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai Signed-off-by: Nícolas F. R. A. Prado --- (no changes since v1) .../boot/dts/mediatek/mt8192-asurada.dtsi | 28 +++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi index fafca7428539..666021ca4d4f 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -23,6 +23,16 @@ memory@40000000 { reg = <0 0x40000000 0 0x80000000>; }; + backlight_lcd0: backlight-lcd0 { + compatible = "pwm-backlight"; + pwms = <&pwm0 0 500000>; + power-supply = <&ppvar_sys>; + enable-gpios = <&pio 152 0>; + brightness-levels = <0 1023>; + num-interpolated-steps = <1023>; + default-brightness-level = <576>; + }; + pp1000_dpbrdg: regulator-1v0-dpbrdg { compatible = "regulator-fixed"; regulator-name = "pp1000_dpbrdg"; @@ -838,6 +848,17 @@ pins-pcie-en-pp3300-wlan { }; }; + pwm0_pins: pwm0-default-pins { + pins-pwm { + pinmux = ; + }; + + pins-inhibit { + pinmux = ; + output-high; + }; + }; + scp_pins: scp-pins { pins-vreq-vao { pinmux = ; @@ -899,6 +920,13 @@ &pmic { interrupts-extended = <&pio 214 IRQ_TYPE_LEVEL_HIGH>; }; +&pwm0 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_pins>; +}; + &scp { status = "okay";