From patchwork Tue Oct 25 07:42:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 13018679 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4E3CBC04A95 for ; Tue, 25 Oct 2022 07:43:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id: Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=t6qFQWHmKSFyBCgF8VJRGuHsK4Ei7rkne6tsfke6P0E=; b=xBVohKM4P3llzG j7V0HyUIc64fZio/XLmqDldSriAEWK1JF5g9v9+dVUVzc94sOjPjMf4d4xPaONjtt2khm6UiuTxUV OmOo3wGThNqqwC8DfSrRDGaVgtsgKzVN9iJWUVZXOBqdedMiCPcumv91PvKWlcRo8obv8xWJMb2a3 km77JAWfIwcXCoW2LrU0d07T8jXw8DUgBo8k9MfwNQf7q7G/0IwhT1NpLpVyJ4/umLAg4VUAoiHrT I5yMOy7aa3jYvCa1kUuziX89zm2dRyGolgt70DygviG/DldSVJiKFlidPnXTYTDYQrtyMnuSPQQha CXzx5yGA8LJ849QX+GWQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1onEbA-004CvX-1W; Tue, 25 Oct 2022 07:43:44 +0000 Received: from mxout1.routing.net ([2a03:2900:1:a::a]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1onEaH-004CWF-J6; Tue, 25 Oct 2022 07:42:51 +0000 Received: from mxbox3.masterlogin.de (unknown [192.168.10.78]) by mxout1.routing.net (Postfix) with ESMTP id A2A4241A41; Tue, 25 Oct 2022 07:42:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1666683763; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=t6qFQWHmKSFyBCgF8VJRGuHsK4Ei7rkne6tsfke6P0E=; b=hvp3OaNLPnEHPkvGEL6eRRA9k8zTbF/FAYyKsOIh60ozxvTYJ0LwF+VPhCs8fE3IJcVpud vrrdMxch6mdP/czn3jY8VMGqsyB804SyyA42hmrIMJtrxF9i/au67HLGBIxTdqT07ZREGI fDE9khkSOwxBlAYGvB7tPpOOE1PbEY4= Received: from frank-G5.. (fttx-pool-217.61.152.57.bambit.de [217.61.152.57]) by mxbox3.masterlogin.de (Postfix) with ESMTPSA id 654A4360953; Tue, 25 Oct 2022 07:42:42 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Subject: [PATCH v4 1/6] dt-bindings: mmc: mtk-sd: Set clocks based on compatible Date: Tue, 25 Oct 2022 09:42:33 +0200 Message-Id: <20221025074238.18136-2-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221025074238.18136-1-linux@fw-web.de> References: <20221025074238.18136-1-linux@fw-web.de> MIME-Version: 1.0 X-Mail-ID: cd1a738d-76ed-44e9-8321-d6fe3baf420a X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221025_004249_988323_4A6A4811 X-CRM114-Status: GOOD ( 12.48 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Ulf Hansson , =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Wenbin Mei , Sam Shih , linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Rob Herring , linux-arm-kernel@lists.infradead.org, Krzysztof Kozlowski , Matthias Brugger , Chaotian Jing Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: Nícolas F. R. A. Prado The binding was describing a single clock list for all platforms, but that's not really suitable: Most platforms using at least 2 clocks (source, hclk), some of them a third "source_cg". Mt2712 requires an extra 'bus_clk' on some of its controllers, while mt8192 requires 8 clocks. Move the clock definitions inside if blocks that match on the compatibles. I used Patch from Nícolas F. R. A. Prado and modified it to not using "not" statement. Fixes: 59a23395d8aa ("dt-bindings: mmc: Add support for MT8192 SoC") Signed-off-by: Nícolas F. R. A. Prado Signed-off-by: Frank Wunderlich Reviewed-by: Krzysztof Kozlowski --- v2: - add this patch v3: - add blank lines and change "not" to matchlist - reorder entries - make generic first then order alphanumeric - rewrite commit description - drop soc-specific mt8183 - constraints were also set for it above v4: - re-add mt8183 reg-minitems --- .../devicetree/bindings/mmc/mtk-sd.yaml | 123 +++++++++++++----- 1 file changed, 93 insertions(+), 30 deletions(-) diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml index d8e1e2e9adf2..0cedeb12892d 100644 --- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml @@ -10,9 +10,6 @@ maintainers: - Chaotian Jing - Wenbin Mei -allOf: - - $ref: mmc-controller.yaml# - properties: compatible: oneOf: @@ -48,27 +45,11 @@ properties: description: Should contain phandle for the clock feeding the MMC controller. minItems: 2 - items: - - description: source clock (required). - - description: HCLK which used for host (required). - - description: independent source clock gate (required for MT2712). - - description: bus clock used for internal register access (required for MT2712 MSDC0/3). - - description: msdc subsys clock gate (required for MT8192). - - description: peripheral bus clock gate (required for MT8192). - - description: AXI bus clock gate (required for MT8192). - - description: AHB bus clock gate (required for MT8192). + maxItems: 7 clock-names: minItems: 2 - items: - - const: source - - const: hclk - - const: source_cg - - const: bus_clk - - const: sys_cg - - const: pclk_cg - - const: axi_cg - - const: ahb_cg + maxItems: 7 interrupts: description: @@ -190,15 +171,97 @@ required: - vmmc-supply - vqmmc-supply -if: - properties: - compatible: - contains: - const: mediatek,mt8183-mmc -then: - properties: - reg: - minItems: 2 +allOf: + - $ref: mmc-controller.yaml# + - if: + properties: + compatible: + enum: + - mediatek,mt2701-mmc + - mediatek,mt6779-mmc + - mediatek,mt6795-mmc + - mediatek,mt7620-mmc + - mediatek,mt7622-mmc + - mediatek,mt7623-mmc + - mediatek,mt8135-mmc + - mediatek,mt8173-mmc + - mediatek,mt8183-mmc + - mediatek,mt8186-mmc + - mediatek,mt8188-mmc + - mediatek,mt8195-mmc + - mediatek,mt8516-mmc + then: + properties: + clocks: + minItems: 2 + items: + - description: source clock + - description: HCLK which used for host + - description: independent source clock gate + clock-names: + minItems: 2 + items: + - const: source + - const: hclk + - const: source_cg + + - if: + properties: + compatible: + contains: + const: mediatek,mt2712-mmc + then: + properties: + clocks: + minItems: 3 + items: + - description: source clock + - description: HCLK which used for host + - description: independent source clock gate + - description: bus clock used for internal register access (required for MSDC0/3). + clock-names: + minItems: 3 + items: + - const: source + - const: hclk + - const: source_cg + - const: bus_clk + + - if: + properties: + compatible: + contains: + const: mediatek,mt8183-mmc + then: + properties: + reg: + minItems: 2 + + - if: + properties: + compatible: + contains: + const: mediatek,mt8192-mmc + then: + properties: + clocks: + items: + - description: source clock + - description: HCLK which used for host + - description: independent source clock gate + - description: msdc subsys clock gate + - description: peripheral bus clock gate + - description: AXI bus clock gate + - description: AHB bus clock gate + clock-names: + items: + - const: source + - const: hclk + - const: source_cg + - const: sys_cg + - const: pclk_cg + - const: axi_cg + - const: ahb_cg unevaluatedProperties: false