| Message ID | 20230201021500.26769-6-xiangsheng.hou@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add MediaTek MT7986 NAND ECC engine support | expand |
On 01/02/2023 03:15, Xiangsheng Hou wrote: > Add ECC support fot MT7986 IC, and change err_mask value with > GENMASK macro. > > Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com> > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> > --- > drivers/mtd/nand/ecc-mtk.c | 28 +++++++++++++++++++++++++--- > 1 file changed, 25 insertions(+), 3 deletions(-) > > diff --git a/drivers/mtd/nand/ecc-mtk.c b/drivers/mtd/nand/ecc-mtk.c > index 9f9b201fe706..c75bb8b80cc1 100644 > --- a/drivers/mtd/nand/ecc-mtk.c > +++ b/drivers/mtd/nand/ecc-mtk.c > @@ -40,6 +40,10 @@ > #define ECC_IDLE_REG(op) ((op) == ECC_ENCODE ? ECC_ENCIDLE : ECC_DECIDLE) > #define ECC_CTL_REG(op) ((op) == ECC_ENCODE ? ECC_ENCCON : ECC_DECCON) > > +#define ECC_ERRMASK_MT7622 GENMASK(4, 0) > +#define ECC_ERRMASK_MT2701 GENMASK(5, 0) > +#define ECC_ERRMASK_MT2712 GENMASK(6, 0) > + > struct mtk_ecc_caps { > u32 err_mask; > u32 err_shift; > @@ -79,6 +83,10 @@ static const u8 ecc_strength_mt7622[] = { > 4, 6, 8, 10, 12 > }; > > +static const u8 ecc_strength_mt7986[] = { > + 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24 > +}; > + > enum mtk_ecc_regs { > ECC_ENCPAR00, > ECC_ENCIRQ_EN, > @@ -451,7 +459,7 @@ unsigned int mtk_ecc_get_parity_bits(struct mtk_ecc *ecc) > EXPORT_SYMBOL(mtk_ecc_get_parity_bits); > > static const struct mtk_ecc_caps mtk_ecc_caps_mt2701 = { > - .err_mask = 0x3f, > + .err_mask = ECC_ERRMASK_MT2701, > .err_shift = 8, > .ecc_strength = ecc_strength_mt2701, > .ecc_regs = mt2701_ecc_regs, > @@ -462,7 +470,7 @@ static const struct mtk_ecc_caps mtk_ecc_caps_mt2701 = { > }; > > static const struct mtk_ecc_caps mtk_ecc_caps_mt2712 = { > - .err_mask = 0x7f, > + .err_mask = ECC_ERRMASK_MT2712, > .err_shift = 8, > .ecc_strength = ecc_strength_mt2712, > .ecc_regs = mt2712_ecc_regs, > @@ -473,7 +481,7 @@ static const struct mtk_ecc_caps mtk_ecc_caps_mt2712 = { > }; > > static const struct mtk_ecc_caps mtk_ecc_caps_mt7622 = { > - .err_mask = 0x1f, > + .err_mask = ECC_ERRMASK_MT7622, > .err_shift = 5, > .ecc_strength = ecc_strength_mt7622, > .ecc_regs = mt7622_ecc_regs, > @@ -483,6 +491,17 @@ static const struct mtk_ecc_caps mtk_ecc_caps_mt7622 = { > .pg_irq_sel = 0, > }; > > +static const struct mtk_ecc_caps mtk_ecc_caps_mt7986 = { > + .err_mask = ECC_ERRMASK_MT7622, > + .err_shift = 8, > + .ecc_strength = ecc_strength_mt7986, > + .ecc_regs = mt2712_ecc_regs, > + .num_ecc_strength = 11, > + .ecc_mode_shift = 5, > + .parity_bits = 14, > + .pg_irq_sel = 1, > +}; > + > static const struct of_device_id mtk_ecc_dt_match[] = { > { > .compatible = "mediatek,mt2701-ecc", > @@ -493,6 +512,9 @@ static const struct of_device_id mtk_ecc_dt_match[] = { > }, { > .compatible = "mediatek,mt7622-ecc", > .data = &mtk_ecc_caps_mt7622, > + }, { > + .compatible = "mediatek,mt7986-ecc", > + .data = &mtk_ecc_caps_mt7986, > }, > {}, > };
On Wed, 2023-02-01 at 02:15:00 UTC, Xiangsheng Hou wrote: > Add ECC support fot MT7986 IC, and change err_mask value with > GENMASK macro. > > Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com> > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git nand/next, thanks. Miquel
diff --git a/drivers/mtd/nand/ecc-mtk.c b/drivers/mtd/nand/ecc-mtk.c index 9f9b201fe706..c75bb8b80cc1 100644 --- a/drivers/mtd/nand/ecc-mtk.c +++ b/drivers/mtd/nand/ecc-mtk.c @@ -40,6 +40,10 @@ #define ECC_IDLE_REG(op) ((op) == ECC_ENCODE ? ECC_ENCIDLE : ECC_DECIDLE) #define ECC_CTL_REG(op) ((op) == ECC_ENCODE ? ECC_ENCCON : ECC_DECCON) +#define ECC_ERRMASK_MT7622 GENMASK(4, 0) +#define ECC_ERRMASK_MT2701 GENMASK(5, 0) +#define ECC_ERRMASK_MT2712 GENMASK(6, 0) + struct mtk_ecc_caps { u32 err_mask; u32 err_shift; @@ -79,6 +83,10 @@ static const u8 ecc_strength_mt7622[] = { 4, 6, 8, 10, 12 }; +static const u8 ecc_strength_mt7986[] = { + 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24 +}; + enum mtk_ecc_regs { ECC_ENCPAR00, ECC_ENCIRQ_EN, @@ -451,7 +459,7 @@ unsigned int mtk_ecc_get_parity_bits(struct mtk_ecc *ecc) EXPORT_SYMBOL(mtk_ecc_get_parity_bits); static const struct mtk_ecc_caps mtk_ecc_caps_mt2701 = { - .err_mask = 0x3f, + .err_mask = ECC_ERRMASK_MT2701, .err_shift = 8, .ecc_strength = ecc_strength_mt2701, .ecc_regs = mt2701_ecc_regs, @@ -462,7 +470,7 @@ static const struct mtk_ecc_caps mtk_ecc_caps_mt2701 = { }; static const struct mtk_ecc_caps mtk_ecc_caps_mt2712 = { - .err_mask = 0x7f, + .err_mask = ECC_ERRMASK_MT2712, .err_shift = 8, .ecc_strength = ecc_strength_mt2712, .ecc_regs = mt2712_ecc_regs, @@ -473,7 +481,7 @@ static const struct mtk_ecc_caps mtk_ecc_caps_mt2712 = { }; static const struct mtk_ecc_caps mtk_ecc_caps_mt7622 = { - .err_mask = 0x1f, + .err_mask = ECC_ERRMASK_MT7622, .err_shift = 5, .ecc_strength = ecc_strength_mt7622, .ecc_regs = mt7622_ecc_regs, @@ -483,6 +491,17 @@ static const struct mtk_ecc_caps mtk_ecc_caps_mt7622 = { .pg_irq_sel = 0, }; +static const struct mtk_ecc_caps mtk_ecc_caps_mt7986 = { + .err_mask = ECC_ERRMASK_MT7622, + .err_shift = 8, + .ecc_strength = ecc_strength_mt7986, + .ecc_regs = mt2712_ecc_regs, + .num_ecc_strength = 11, + .ecc_mode_shift = 5, + .parity_bits = 14, + .pg_irq_sel = 1, +}; + static const struct of_device_id mtk_ecc_dt_match[] = { { .compatible = "mediatek,mt2701-ecc", @@ -493,6 +512,9 @@ static const struct of_device_id mtk_ecc_dt_match[] = { }, { .compatible = "mediatek,mt7622-ecc", .data = &mtk_ecc_caps_mt7622, + }, { + .compatible = "mediatek,mt7986-ecc", + .data = &mtk_ecc_caps_mt7986, }, {}, };