Message ID | 20230203-evk-board-support-v6-11-8d6b1cfe7f29@baylibre.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id 25-20020a05600c025900b003ed2c0a0f37sm17601988wmj.35.2023.04.26.03.49.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 26 Apr 2023 03:49:48 -0700 (PDT) From: Alexandre Mergnat <amergnat@baylibre.com> Date: Wed, 26 Apr 2023 12:49:11 +0200 Subject: [PATCH v6 11/12] arm64: dts: mediatek: add cpufreq support for mt8365-evk MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20230203-evk-board-support-v6-11-8d6b1cfe7f29@baylibre.com> References: <20230203-evk-board-support-v6-0-8d6b1cfe7f29@baylibre.com> In-Reply-To: <20230203-evk-board-support-v6-0-8d6b1cfe7f29@baylibre.com> To: Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org>, Wim Van Sebroeck <wim@linux-watchdog.org>, Guenter Roeck <linux@roeck-us.net>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Matthias Brugger <matthias.bgg@gmail.com>, AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org, Alexandre Mergnat <amergnat@baylibre.com>, Kevin Hilman <khilman@baylibre.com> X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1201; i=amergnat@baylibre.com; h=from:subject:message-id; bh=8Q6eOHc4c87inPFqFs4vtsSVYC3iqYyqZgc3XDzlolA=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBkSQG/hDpBoD878FPr2DkV8harEpFM3Ox7ZqJeskYq 9y2/BeWJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZEkBvwAKCRArRkmdfjHURWUlEA C94wxHgmvDD3U4pZ3Ktd3ZX2/i5srtf7rftX3B/ytiHYHT49oUP/UuynlO9pWFTtOH8ZWlb7Hk+fEZ DyMDMaHj/mpCHuwBANQ2Pt04d4ew1qTca2cf4ID+lnXWQM4aIasWl4r5Rh+cnM1JRRed8x1PNjOjlv OVNfEC4MBeHyw0YlEW7HDJH+kq4RVYLCN2+QkRpt4xskXNaxQD/XXNEx0GPQ5oZCz277E8JWqYsA2f cPosCul0HCa4wM9pmAYVUujX+eeYalKi3FANg8MWs3I2H3eQOIFBmdFyXi7hcKh0SCvSfB/jWxU+1/ I6WIK9QvUZD2LVEEG54j87RQ8OztFDkl0trp9G9lhfa/GjEPJIvBYCJ/cT7houHIaTdsCT8vy0fI5R mtFi1Qfiuwcb2L5EYCLq6V/qb1zwCwYmYuqWdiP+Qn5WtxEviNNJZOlkBQS95eufcKGyVEC0Mt5j/k ipo0Evw2evQuNNecOvQBffQhK/+kaWBPCh5Vv1W5bGWJzZ2I+8+EuAWsoo0gN7fyRxhtJJTGJKnmtv xDNGXCzQ3m8OgrENG3z7xkUPWUvAyzZBsPrhdTNkYaM3izBPmVxvlZeopUIStu8ZIIEVnVRT4ggzXB JAdIy4lO4WxIiyPc12Kib1emWJ7E0jEP5Z1Hr/t/LM8NExAezS+2jqtInakg== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230426_034951_929455_EB570D48 X-CRM114-Status: UNSURE ( 9.42 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: <linux-mediatek.lists.infradead.org> List-Unsubscribe: <http://lists.infradead.org/mailman/options/linux-mediatek>, <mailto:linux-mediatek-request@lists.infradead.org?subject=unsubscribe> List-Archive: <http://lists.infradead.org/pipermail/linux-mediatek/> List-Post: <mailto:linux-mediatek@lists.infradead.org> List-Help: <mailto:linux-mediatek-request@lists.infradead.org?subject=help> List-Subscribe: <http://lists.infradead.org/mailman/listinfo/linux-mediatek>, <mailto:linux-mediatek-request@lists.infradead.org?subject=subscribe> Sender: "Linux-mediatek" <linux-mediatek-bounces@lists.infradead.org> Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org |
Series |
Improve the MT8365 SoC and EVK board support
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expand
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diff --git a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts index 5a4c41dbd3a5..3ab897d5e468 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts +++ b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts @@ -88,6 +88,26 @@ optee_reserved: optee@43200000 { }; }; +&cpu0 { + proc-supply = <&mt6357_vproc_reg>; + sram-supply = <&mt6357_vsram_proc_reg>; +}; + +&cpu1 { + proc-supply = <&mt6357_vproc_reg>; + sram-supply = <&mt6357_vsram_proc_reg>; +}; + +&cpu2 { + proc-supply = <&mt6357_vproc_reg>; + sram-supply = <&mt6357_vsram_proc_reg>; +}; + +&cpu3 { + proc-supply = <&mt6357_vproc_reg>; + sram-supply = <&mt6357_vsram_proc_reg>; +}; + ðernet { pinctrl-0 = <ðernet_pins>; pinctrl-names = "default";