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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id v9-20020a170906338900b0094ee99eeb01sm4209935eja.150.2023.05.11.09.30.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 May 2023 09:30:03 -0700 (PDT) From: Alexandre Mergnat Date: Thu, 11 May 2023 18:29:25 +0200 Subject: [PATCH v7 05/11] arm64: dts: mediatek: add mmc support for mt8365-evk MIME-Version: 1.0 Message-Id: <20230203-evk-board-support-v7-5-98cbdfac656e@baylibre.com> References: <20230203-evk-board-support-v7-0-98cbdfac656e@baylibre.com> In-Reply-To: <20230203-evk-board-support-v7-0-98cbdfac656e@baylibre.com> To: Catalin Marinas , Will Deacon , Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Conor Dooley Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org, Alexandre Mergnat , Kevin Hilman X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=5035; i=amergnat@baylibre.com; h=from:subject:message-id; bh=m1/hU6NtitNkihlVEYyJFtqHag17DqDCQsAPTBN98k4=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBkXRgEkwrMJq+DnU/LcbgxMhUZOc4MYm6nfjC7auPJ /T6bj7qJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZF0YBAAKCRArRkmdfjHURaDKEA CIsLUO65/3xLjoayoYcHQ4VqQxANrN+3DBihOP7CA/6RLp112D1z1P89bKt7A1jav1rAuiSJsRzNL3 PZUiOafqUbangiJxXh1PqFU2XEY14yigYekQEy6pi8eMGV9rfa1yeu7PjeMs552Ms7OWC1hKyCiK9x cmy3NtIG1d6tpCMpdZZ8Wh70JTAU4Ezv68Zl743kKss5zNbELCbfq1VqPNkDLYgqGFw8P7rciZWdlt K4h3G9zFwQIwRf85ns94cdJjwbGo08lkGPlTcgXfqfIuOmOA5ib7VlW6BN9nPiHlGTyQ4QJ2ybJbgs NTuqdYfBmC1FuIlBK7MkKfzUuIDIdlpIQPLjptCcPhfLOnJZADyrVHCSiWdoL8WsP6MsmuVaLowbR0 raNHdqYbn20TI5U+dMIKsjnPUyLfp+fSlOrCBqZ6+5j/xwyl80YvECkfBS+LBUn0lKfdpY4OPM6afd sXOH/tjCd0Q4+rVe5ksneJbr18VywsoJdoChTjp7lIXSNTVV+4mti5xy+BL3fxeVXeYLjMvmLj/cFC FXBWKJjQOJ/KHhvT5EafFCCGqyu/0XbfjhtnjvC5q7jfqpi8/+tu28+Tyx6WPPn5BntHr0f1c9LWjy DbFsGoeHymoFxrsoNG3BQoTvWe36p3+NdIcniTl6gR78wnRipm8miLeZCZlw== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230511_093007_836939_938EA0EA X-CRM114-Status: UNSURE ( 9.47 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org - Add EMMC support on mmc0 (internal memory) - Add SD-UHS support on mmc1 (external memory) Reviewed-by: AngeloGioacchino Del Regno Tested-by: Kevin Hilman Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 138 ++++++++++++++++++++++++++++ 1 file changed, 138 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts index 6074aa9c1c3e..752007d0598e 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts +++ b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts @@ -95,6 +95,42 @@ &i2c0 { status = "okay"; }; +&mmc0 { + assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL>; + assigned-clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>; + bus-width = <8>; + cap-mmc-highspeed; + cap-mmc-hw-reset; + hs400-ds-delay = <0x12012>; + max-frequency = <200000000>; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + no-sd; + no-sdio; + non-removable; + pinctrl-0 = <&mmc0_default_pins>; + pinctrl-1 = <&mmc0_uhs_pins>; + pinctrl-names = "default", "state_uhs"; + vmmc-supply = <&mt6357_vemc_reg>; + vqmmc-supply = <&mt6357_vio18_reg>; + status = "okay"; +}; + +&mmc1 { + bus-width = <4>; + cap-sd-highspeed; + cd-gpios = <&pio 76 GPIO_ACTIVE_LOW>; + max-frequency = <200000000>; + pinctrl-0 = <&mmc1_default_pins>; + pinctrl-1 = <&mmc1_uhs_pins>; + pinctrl-names = "default", "state_uhs"; + sd-uhs-sdr104; + sd-uhs-sdr50; + vmmc-supply = <&mt6357_vmch_reg>; + vqmmc-supply = <&mt6357_vio18_reg>; + status = "okay"; +}; + &mt6357_pmic { interrupts-extended = <&pio 145 IRQ_TYPE_LEVEL_HIGH>; interrupt-controller; @@ -118,6 +154,108 @@ pins { }; }; + mmc0_default_pins: mmc0-default-pins { + clk-pins { + pinmux = ; + bias-pull-down; + }; + + cmd-dat-pins { + pinmux = , + , + , + , + , + , + , + , + ; + input-enable; + bias-pull-up; + }; + + rst-pins { + pinmux = ; + bias-pull-up; + }; + }; + + mmc0_uhs_pins: mmc0-uhs-pins { + clk-pins { + pinmux = ; + drive-strength = ; + bias-pull-down = ; + }; + + cmd-dat-pins { + pinmux = , + , + , + , + , + , + , + , + ; + input-enable; + drive-strength = ; + bias-pull-up = ; + }; + + ds-pins { + pinmux = ; + drive-strength = ; + bias-pull-down = ; + }; + + rst-pins { + pinmux = ; + drive-strength = ; + bias-pull-up; + }; + }; + + mmc1_default_pins: mmc1-default-pins { + cd-pins { + pinmux = ; + bias-pull-up; + }; + + clk-pins { + pinmux = ; + bias-pull-down = ; + }; + + cmd-dat-pins { + pinmux = , + , + , + , + ; + input-enable; + bias-pull-up = ; + }; + }; + + mmc1_uhs_pins: mmc1-uhs-pins { + clk-pins { + pinmux = ; + drive-strength = ; + bias-pull-down = ; + }; + + cmd-dat-pins { + pinmux = , + , + , + , + ; + input-enable; + drive-strength = ; + bias-pull-up = ; + }; + }; + uart0_pins: uart0-pins { pins { pinmux = ,