| Message ID | 20230915075003.1552-3-chun-jen.tseng@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | soc: mediatek: svs: add support for mt8188 | expand |
Il 15/09/23 09:50, Mark Tseng ha scritto: > MT8188 svs gpu uses 2-line high bank and low bank to optimize the > voltage of opp table for higher and lower frequency respectively. > > Signed-off-by: Mark Tseng <chun-jen.tseng@mediatek.com> > --- > drivers/soc/mediatek/mtk-svs.c | 177 ++++++++++++++++++++++++++++++++- > 1 file changed, 172 insertions(+), 5 deletions(-) > > diff --git a/drivers/soc/mediatek/mtk-svs.c b/drivers/soc/mediatek/mtk-svs.c > index 3a2f97cd5272..fafc72df99ee 100644 > --- a/drivers/soc/mediatek/mtk-svs.c > +++ b/drivers/soc/mediatek/mtk-svs.c > @@ -407,6 +407,7 @@ struct svs_platform_data { > * @dcbdet: svs efuse data > * @dcmdet: svs efuse data > * @turn_pt: 2-line turn point tells which opp_volt calculated by high/low bank > + * @vbin_turn_pt: voltage bin turn point helps know which svsb_volt should be overridden > * @type: bank type to represent it is 2-line (high/low) bank or 1-line bank > * > * Svs bank will generate suitalbe voltages by below general math equation > @@ -469,6 +470,7 @@ struct svs_bank { > u32 dcbdet; > u32 dcmdet; > u32 turn_pt; > + u32 vbin_turn_pt; > u32 type; > }; > > @@ -751,11 +753,12 @@ static int svs_status_debug_show(struct seq_file *m, void *v) > > ret = thermal_zone_get_temp(svsb->tzd, &tzone_temp); > if (ret) > - seq_printf(m, "%s: temperature ignore, turn_pt = %u\n", > - svsb->name, svsb->turn_pt); > + seq_printf(m, "%s: temperature ignore, vbin_turn_pt = %u, turn_pt = %u\n", > + svsb->name, svsb->vbin_turn_pt, svsb->turn_pt); > else > - seq_printf(m, "%s: temperature = %d, turn_pt = %u\n", > - svsb->name, tzone_temp, svsb->turn_pt); > + seq_printf(m, "%s: temperature = %d, vbin_turn_pt = %u, turn_pt = %u\n", > + svsb->name, tzone_temp, svsb->vbin_turn_pt, > + svsb->turn_pt); > > for (i = 0; i < svsb->opp_count; i++) { > opp = dev_pm_opp_find_freq_exact(svsb->opp_dev, > @@ -952,6 +955,29 @@ static void svs_get_bank_volts_v3(struct svs_platform *svsp) > for (i = opp_start; i < opp_stop; i++) > if (svsb->volt_flags & SVSB_REMOVE_DVTFIXED_VOLT) > svsb->volt[i] -= svsb->dvt_fixed; > + > + /* For voltage bin support */ > + if (svsb->opp_dfreq[0] > svsb->freq_base) { > + svsb->volt[0] = svs_opp_volt_to_bank_volt(svsb->opp_dvolt[0], > + svsb->volt_step, > + svsb->volt_base); > + > + /* Find voltage bin turn point */ > + for (i = 0; i < svsb->opp_count; i++) { > + if (svsb->opp_dfreq[i] <= svsb->freq_base) { > + svsb->vbin_turn_pt = i; > + break; > + } > + } > + > + /* Override svs bank voltages */ > + for (i = 1; i < svsb->vbin_turn_pt; i++) > + svsb->volt[i] = interpolate(svsb->freq_pct[0], > + svsb->freq_pct[svsb->vbin_turn_pt], > + svsb->volt[0], > + svsb->volt[svsb->vbin_turn_pt], > + svsb->freq_pct[i]); > + } This looks like being a new feature that applies to more than just MT8188? Goes into a different commit. > } > > static void svs_set_bank_freq_pct_v3(struct svs_platform *svsp) > @@ -1808,6 +1834,80 @@ static bool svs_mt8192_efuse_parsing(struct svs_platform *svsp) > return true; > } > > +static bool svs_mt8188_efuse_parsing(struct svs_platform *svsp) > +{ > + struct svs_bank *svsb; > + struct nvmem_cell *cell; > + u32 idx, i, golden_temp; > + > + for (i = 0; i < svsp->efuse_max; i++) > + if (svsp->efuse[i]) > + dev_info(svsp->dev, "M_HW_RES%d: 0x%08x\n", > + i, svsp->efuse[i]); > + > + if (!svsp->efuse[5]) { > + dev_notice(svsp->dev, "svs_efuse[5] = 0x0?\n"); > + return false; > + } > + > + /* Svs efuse parsing */ > + for (idx = 0; idx < svsp->bank_max; idx++) { > + svsb = &svsp->banks[idx]; > + > + if (svsb->type == SVSB_LOW) { > + svsb->mtdes = svsp->efuse[5] & GENMASK(7, 0); > + svsb->bdes = (svsp->efuse[5] >> 16) & GENMASK(7, 0); > + svsb->mdes = (svsp->efuse[5] >> 24) & GENMASK(7, 0); > + svsb->dcbdet = (svsp->efuse[15] >> 16) & GENMASK(7, 0); > + svsb->dcmdet = (svsp->efuse[15] >> 24) & GENMASK(7, 0); > + } else if (svsb->type == SVSB_HIGH) { > + svsb->mtdes = svsp->efuse[4] & GENMASK(7, 0); > + svsb->bdes = (svsp->efuse[4] >> 16) & GENMASK(7, 0); > + svsb->mdes = (svsp->efuse[4] >> 24) & GENMASK(7, 0); > + svsb->dcbdet = svsp->efuse[14] & GENMASK(7, 0); > + svsb->dcmdet = (svsp->efuse[14] >> 8) & GENMASK(7, 0); > + } > + > + svsb->vmax += svsb->dvt_fixed; > + } The only change between mt8192, 8195 and 8188 is this for loop; can we please commonize the rest of the function? > + > + /* Thermal efuse parsing */ > + cell = nvmem_cell_get(svsp->dev, "t-calibration-data"); > + if (IS_ERR_OR_NULL(cell)) { > + dev_err(svsp->dev, "no \"t-calibration-data\"? %ld\n", > + PTR_ERR(cell)); > + return false; > + } > + > + svsp->tefuse = nvmem_cell_read(cell, &svsp->tefuse_max); > + if (IS_ERR(svsp->tefuse)) { > + dev_err(svsp->dev, "cannot read thermal efuse: %ld\n", > + PTR_ERR(svsp->tefuse)); > + nvmem_cell_put(cell); > + return false; > + } > + > + svsp->tefuse_max /= sizeof(u32); > + nvmem_cell_put(cell); > + > + for (i = 0; i < svsp->tefuse_max; i++) > + if (svsp->tefuse[i] != 0) > + break; > + > + if (i == svsp->tefuse_max) > + golden_temp = 50; /* All thermal efuse data are 0 */ > + else > + golden_temp = (svsp->tefuse[0] & GENMASK(31, 24)) >> 24; > + > + for (idx = 0; idx < svsp->bank_max; idx++) { > + svsb = &svsp->banks[idx]; > + svsb->mts = 500; > + svsb->bts = (((500 * golden_temp + 250460) / 1000) - 25) * 4; > + } > + > + return true; > +} > + > static bool svs_mt8183_efuse_parsing(struct svs_platform *svsp) > { > struct svs_bank *svsb; > @@ -2052,7 +2152,7 @@ static int svs_mt8192_platform_probe(struct svs_platform *svsp) > return dev_err_probe(svsp->dev, PTR_ERR(svsp->rst), > "cannot get svs reset control\n"); > > - dev = svs_add_device_link(svsp, "lvts"); > + dev = svs_add_device_link(svsp, "thermal-sensor"); This is a fix that must go in a different commit with a Fixes tag. > if (IS_ERR(dev)) > return dev_err_probe(svsp->dev, PTR_ERR(dev), > "failed to get lvts device\n"); > @@ -2173,6 +2273,61 @@ static struct svs_bank svs_mt8192_banks[] = { > }, > }; > Regards, Angelo
On Fri, 2023-09-15 at 11:20 +0200, AngeloGioacchino Del Regno wrote: > Il 15/09/23 09:50, Mark Tseng ha scritto: > > MT8188 svs gpu uses 2-line high bank and low bank to optimize the > > voltage of opp table for higher and lower frequency respectively. > > > > Signed-off-by: Mark Tseng <chun-jen.tseng@mediatek.com> > > --- > > drivers/soc/mediatek/mtk-svs.c | 177 > > ++++++++++++++++++++++++++++++++- > > 1 file changed, 172 insertions(+), 5 deletions(-) > > > > diff --git a/drivers/soc/mediatek/mtk-svs.c > > b/drivers/soc/mediatek/mtk-svs.c > > index 3a2f97cd5272..fafc72df99ee 100644 > > --- a/drivers/soc/mediatek/mtk-svs.c > > +++ b/drivers/soc/mediatek/mtk-svs.c > > @@ -407,6 +407,7 @@ struct svs_platform_data { > > * @dcbdet: svs efuse data > > * @dcmdet: svs efuse data > > * @turn_pt: 2-line turn point tells which opp_volt calculated by > > high/low bank > > + * @vbin_turn_pt: voltage bin turn point helps know which > > svsb_volt should be overridden > > * @type: bank type to represent it is 2-line (high/low) bank or > > 1-line bank > > * > > * Svs bank will generate suitalbe voltages by below general math > > equation > > @@ -469,6 +470,7 @@ struct svs_bank { > > u32 dcbdet; > > u32 dcmdet; > > u32 turn_pt; > > + u32 vbin_turn_pt; > > u32 type; > > }; > > > > @@ -751,11 +753,12 @@ static int svs_status_debug_show(struct > > seq_file *m, void *v) > > > > ret = thermal_zone_get_temp(svsb->tzd, &tzone_temp); > > if (ret) > > - seq_printf(m, "%s: temperature ignore, turn_pt = %u\n", > > - svsb->name, svsb->turn_pt); > > + seq_printf(m, "%s: temperature ignore, vbin_turn_pt = > > %u, turn_pt = %u\n", > > + svsb->name, svsb->vbin_turn_pt, svsb- > > >turn_pt); > > else > > - seq_printf(m, "%s: temperature = %d, turn_pt = %u\n", > > - svsb->name, tzone_temp, svsb->turn_pt); > > + seq_printf(m, "%s: temperature = %d, vbin_turn_pt = %u, > > turn_pt = %u\n", > > + svsb->name, tzone_temp, svsb->vbin_turn_pt, > > + svsb->turn_pt); > > > > for (i = 0; i < svsb->opp_count; i++) { > > opp = dev_pm_opp_find_freq_exact(svsb->opp_dev, > > @@ -952,6 +955,29 @@ static void svs_get_bank_volts_v3(struct > > svs_platform *svsp) > > for (i = opp_start; i < opp_stop; i++) > > if (svsb->volt_flags & SVSB_REMOVE_DVTFIXED_VOLT) > > svsb->volt[i] -= svsb->dvt_fixed; > > + > > + /* For voltage bin support */ > > + if (svsb->opp_dfreq[0] > svsb->freq_base) { > > + svsb->volt[0] = svs_opp_volt_to_bank_volt(svsb- > > >opp_dvolt[0], > > + svsb- > > >volt_step, > > + svsb- > > >volt_base); > > + > > + /* Find voltage bin turn point */ > > + for (i = 0; i < svsb->opp_count; i++) { > > + if (svsb->opp_dfreq[i] <= svsb->freq_base) { > > + svsb->vbin_turn_pt = i; > > + break; > > + } > > + } > > + > > + /* Override svs bank voltages */ > > + for (i = 1; i < svsb->vbin_turn_pt; i++) > > + svsb->volt[i] = interpolate(svsb->freq_pct[0], > > + svsb- > > >freq_pct[svsb->vbin_turn_pt], > > + svsb->volt[0], > > + svsb->volt[svsb- > > >vbin_turn_pt], > > + svsb->freq_pct[i]); > > + } > > This looks like being a new feature that applies to more than just > MT8188? > Goes into a different commit. > this is voltage bin turn point, it is for all SoC , not for mt8188. > > } > > > > static void svs_set_bank_freq_pct_v3(struct svs_platform *svsp) > > @@ -1808,6 +1834,80 @@ static bool svs_mt8192_efuse_parsing(struct > > svs_platform *svsp) > > return true; > > } > > > > +static bool svs_mt8188_efuse_parsing(struct svs_platform *svsp) > > +{ > > + struct svs_bank *svsb; > > + struct nvmem_cell *cell; > > + u32 idx, i, golden_temp; > > + > > + for (i = 0; i < svsp->efuse_max; i++) > > + if (svsp->efuse[i]) > > + dev_info(svsp->dev, "M_HW_RES%d: 0x%08x\n", > > + i, svsp->efuse[i]); > > + > > + if (!svsp->efuse[5]) { > > + dev_notice(svsp->dev, "svs_efuse[5] = 0x0?\n"); > > + return false; > > + } > > + > > + /* Svs efuse parsing */ > > + for (idx = 0; idx < svsp->bank_max; idx++) { > > + svsb = &svsp->banks[idx]; > > + > > + if (svsb->type == SVSB_LOW) { > > + svsb->mtdes = svsp->efuse[5] & GENMASK(7, 0); > > + svsb->bdes = (svsp->efuse[5] >> 16) & > > GENMASK(7, 0); > > + svsb->mdes = (svsp->efuse[5] >> 24) & > > GENMASK(7, 0); > > + svsb->dcbdet = (svsp->efuse[15] >> 16) & > > GENMASK(7, 0); > > + svsb->dcmdet = (svsp->efuse[15] >> 24) & > > GENMASK(7, 0); > > + } else if (svsb->type == SVSB_HIGH) { > > + svsb->mtdes = svsp->efuse[4] & GENMASK(7, 0); > > + svsb->bdes = (svsp->efuse[4] >> 16) & > > GENMASK(7, 0); > > + svsb->mdes = (svsp->efuse[4] >> 24) & > > GENMASK(7, 0); > > + svsb->dcbdet = svsp->efuse[14] & GENMASK(7, 0); > > + svsb->dcmdet = (svsp->efuse[14] >> 8) & > > GENMASK(7, 0); > > + } > > + > > + svsb->vmax += svsb->dvt_fixed; > > + } > > The only change between mt8192, 8195 and 8188 is this for loop; can > we please > commonize the rest of the function? > I have diff mt8192, 8195 and 8188 parsing code. It looks not only this for loop part different, it also have vmin and ft_pgm need to check. > > + > > + /* Thermal efuse parsing */ > > + cell = nvmem_cell_get(svsp->dev, "t-calibration-data"); > > + if (IS_ERR_OR_NULL(cell)) { > > + dev_err(svsp->dev, "no \"t-calibration-data\"? %ld\n", > > + PTR_ERR(cell)); > > + return false; > > + } > > + > > + svsp->tefuse = nvmem_cell_read(cell, &svsp->tefuse_max); > > + if (IS_ERR(svsp->tefuse)) { > > + dev_err(svsp->dev, "cannot read thermal efuse: %ld\n", > > + PTR_ERR(svsp->tefuse)); > > + nvmem_cell_put(cell); > > + return false; > > + } > > + > > + svsp->tefuse_max /= sizeof(u32); > > + nvmem_cell_put(cell); > > + > > + for (i = 0; i < svsp->tefuse_max; i++) > > + if (svsp->tefuse[i] != 0) > > + break; > > + > > + if (i == svsp->tefuse_max) > > + golden_temp = 50; /* All thermal efuse data are 0 */ > > + else > > + golden_temp = (svsp->tefuse[0] & GENMASK(31, 24)) >> > > 24; > > + > > + for (idx = 0; idx < svsp->bank_max; idx++) { > > + svsb = &svsp->banks[idx]; > > + svsb->mts = 500; > > + svsb->bts = (((500 * golden_temp + 250460) / 1000) - > > 25) * 4; > > + } > > + > > + return true; > > +} > > + > > static bool svs_mt8183_efuse_parsing(struct svs_platform *svsp) > > { > > struct svs_bank *svsb; > > @@ -2052,7 +2152,7 @@ static int svs_mt8192_platform_probe(struct > > svs_platform *svsp) > > return dev_err_probe(svsp->dev, PTR_ERR(svsp->rst), > > "cannot get svs reset control\n"); > > > > - dev = svs_add_device_link(svsp, "lvts"); > > + dev = svs_add_device_link(svsp, "thermal-sensor"); > > This is a fix that must go in a different commit with a Fixes tag. > I have already checked this part, that's my mistake, I will update v2 patch to fixed this. > > if (IS_ERR(dev)) > > return dev_err_probe(svsp->dev, PTR_ERR(dev), > > "failed to get lvts device\n"); > > @@ -2173,6 +2273,61 @@ static struct svs_bank svs_mt8192_banks[] = > > { > > }, > > }; > > > > Regards, > Angelo >
diff --git a/drivers/soc/mediatek/mtk-svs.c b/drivers/soc/mediatek/mtk-svs.c index 3a2f97cd5272..fafc72df99ee 100644 --- a/drivers/soc/mediatek/mtk-svs.c +++ b/drivers/soc/mediatek/mtk-svs.c @@ -407,6 +407,7 @@ struct svs_platform_data { * @dcbdet: svs efuse data * @dcmdet: svs efuse data * @turn_pt: 2-line turn point tells which opp_volt calculated by high/low bank + * @vbin_turn_pt: voltage bin turn point helps know which svsb_volt should be overridden * @type: bank type to represent it is 2-line (high/low) bank or 1-line bank * * Svs bank will generate suitalbe voltages by below general math equation @@ -469,6 +470,7 @@ struct svs_bank { u32 dcbdet; u32 dcmdet; u32 turn_pt; + u32 vbin_turn_pt; u32 type; }; @@ -751,11 +753,12 @@ static int svs_status_debug_show(struct seq_file *m, void *v) ret = thermal_zone_get_temp(svsb->tzd, &tzone_temp); if (ret) - seq_printf(m, "%s: temperature ignore, turn_pt = %u\n", - svsb->name, svsb->turn_pt); + seq_printf(m, "%s: temperature ignore, vbin_turn_pt = %u, turn_pt = %u\n", + svsb->name, svsb->vbin_turn_pt, svsb->turn_pt); else - seq_printf(m, "%s: temperature = %d, turn_pt = %u\n", - svsb->name, tzone_temp, svsb->turn_pt); + seq_printf(m, "%s: temperature = %d, vbin_turn_pt = %u, turn_pt = %u\n", + svsb->name, tzone_temp, svsb->vbin_turn_pt, + svsb->turn_pt); for (i = 0; i < svsb->opp_count; i++) { opp = dev_pm_opp_find_freq_exact(svsb->opp_dev, @@ -952,6 +955,29 @@ static void svs_get_bank_volts_v3(struct svs_platform *svsp) for (i = opp_start; i < opp_stop; i++) if (svsb->volt_flags & SVSB_REMOVE_DVTFIXED_VOLT) svsb->volt[i] -= svsb->dvt_fixed; + + /* For voltage bin support */ + if (svsb->opp_dfreq[0] > svsb->freq_base) { + svsb->volt[0] = svs_opp_volt_to_bank_volt(svsb->opp_dvolt[0], + svsb->volt_step, + svsb->volt_base); + + /* Find voltage bin turn point */ + for (i = 0; i < svsb->opp_count; i++) { + if (svsb->opp_dfreq[i] <= svsb->freq_base) { + svsb->vbin_turn_pt = i; + break; + } + } + + /* Override svs bank voltages */ + for (i = 1; i < svsb->vbin_turn_pt; i++) + svsb->volt[i] = interpolate(svsb->freq_pct[0], + svsb->freq_pct[svsb->vbin_turn_pt], + svsb->volt[0], + svsb->volt[svsb->vbin_turn_pt], + svsb->freq_pct[i]); + } } static void svs_set_bank_freq_pct_v3(struct svs_platform *svsp) @@ -1808,6 +1834,80 @@ static bool svs_mt8192_efuse_parsing(struct svs_platform *svsp) return true; } +static bool svs_mt8188_efuse_parsing(struct svs_platform *svsp) +{ + struct svs_bank *svsb; + struct nvmem_cell *cell; + u32 idx, i, golden_temp; + + for (i = 0; i < svsp->efuse_max; i++) + if (svsp->efuse[i]) + dev_info(svsp->dev, "M_HW_RES%d: 0x%08x\n", + i, svsp->efuse[i]); + + if (!svsp->efuse[5]) { + dev_notice(svsp->dev, "svs_efuse[5] = 0x0?\n"); + return false; + } + + /* Svs efuse parsing */ + for (idx = 0; idx < svsp->bank_max; idx++) { + svsb = &svsp->banks[idx]; + + if (svsb->type == SVSB_LOW) { + svsb->mtdes = svsp->efuse[5] & GENMASK(7, 0); + svsb->bdes = (svsp->efuse[5] >> 16) & GENMASK(7, 0); + svsb->mdes = (svsp->efuse[5] >> 24) & GENMASK(7, 0); + svsb->dcbdet = (svsp->efuse[15] >> 16) & GENMASK(7, 0); + svsb->dcmdet = (svsp->efuse[15] >> 24) & GENMASK(7, 0); + } else if (svsb->type == SVSB_HIGH) { + svsb->mtdes = svsp->efuse[4] & GENMASK(7, 0); + svsb->bdes = (svsp->efuse[4] >> 16) & GENMASK(7, 0); + svsb->mdes = (svsp->efuse[4] >> 24) & GENMASK(7, 0); + svsb->dcbdet = svsp->efuse[14] & GENMASK(7, 0); + svsb->dcmdet = (svsp->efuse[14] >> 8) & GENMASK(7, 0); + } + + svsb->vmax += svsb->dvt_fixed; + } + + /* Thermal efuse parsing */ + cell = nvmem_cell_get(svsp->dev, "t-calibration-data"); + if (IS_ERR_OR_NULL(cell)) { + dev_err(svsp->dev, "no \"t-calibration-data\"? %ld\n", + PTR_ERR(cell)); + return false; + } + + svsp->tefuse = nvmem_cell_read(cell, &svsp->tefuse_max); + if (IS_ERR(svsp->tefuse)) { + dev_err(svsp->dev, "cannot read thermal efuse: %ld\n", + PTR_ERR(svsp->tefuse)); + nvmem_cell_put(cell); + return false; + } + + svsp->tefuse_max /= sizeof(u32); + nvmem_cell_put(cell); + + for (i = 0; i < svsp->tefuse_max; i++) + if (svsp->tefuse[i] != 0) + break; + + if (i == svsp->tefuse_max) + golden_temp = 50; /* All thermal efuse data are 0 */ + else + golden_temp = (svsp->tefuse[0] & GENMASK(31, 24)) >> 24; + + for (idx = 0; idx < svsp->bank_max; idx++) { + svsb = &svsp->banks[idx]; + svsb->mts = 500; + svsb->bts = (((500 * golden_temp + 250460) / 1000) - 25) * 4; + } + + return true; +} + static bool svs_mt8183_efuse_parsing(struct svs_platform *svsp) { struct svs_bank *svsb; @@ -2052,7 +2152,7 @@ static int svs_mt8192_platform_probe(struct svs_platform *svsp) return dev_err_probe(svsp->dev, PTR_ERR(svsp->rst), "cannot get svs reset control\n"); - dev = svs_add_device_link(svsp, "lvts"); + dev = svs_add_device_link(svsp, "thermal-sensor"); if (IS_ERR(dev)) return dev_err_probe(svsp->dev, PTR_ERR(dev), "failed to get lvts device\n"); @@ -2173,6 +2273,61 @@ static struct svs_bank svs_mt8192_banks[] = { }, }; +static struct svs_bank svs_mt8188_banks[] = { + { + .sw_id = SVSB_GPU, + .type = SVSB_LOW, + .set_freq_pct = svs_set_bank_freq_pct_v3, + .get_volts = svs_get_bank_volts_v3, + .volt_flags = SVSB_REMOVE_DVTFIXED_VOLT, + .mode_support = SVSB_MODE_INIT02, + .opp_count = MAX_OPP_ENTRIES, + .freq_base = 640000000, + .turn_freq_base = 640000000, + .volt_step = 6250, + .volt_base = 400000, + .vmax = 0x38, + .vmin = 0x1c, + .age_config = 0x555555, + .dc_config = 0x555555, + .dvt_fixed = 0x1, + .vco = 0x10, + .chk_shift = 0x87, + .core_sel = 0x0fff0000, + .int_st = BIT(0), + .ctl0 = 0x00100003, + }, + { + .sw_id = SVSB_GPU, + .type = SVSB_HIGH, + .set_freq_pct = svs_set_bank_freq_pct_v3, + .get_volts = svs_get_bank_volts_v3, + .tzone_name = "gpu1", + .volt_flags = SVSB_REMOVE_DVTFIXED_VOLT | + SVSB_MON_VOLT_IGNORE, + .mode_support = SVSB_MODE_INIT02 | SVSB_MODE_MON, + .opp_count = MAX_OPP_ENTRIES, + .freq_base = 880000000, + .turn_freq_base = 640000000, + .volt_step = 6250, + .volt_base = 400000, + .vmax = 0x38, + .vmin = 0x1c, + .age_config = 0x555555, + .dc_config = 0x555555, + .dvt_fixed = 0x4, + .vco = 0x10, + .chk_shift = 0x87, + .core_sel = 0x0fff0001, + .int_st = BIT(1), + .ctl0 = 0x00100003, + .tzone_htemp = 85000, + .tzone_htemp_voffset = 0, + .tzone_ltemp = 25000, + .tzone_ltemp_voffset = 7, + }, +}; + static struct svs_bank svs_mt8183_banks[] = { { .sw_id = SVSB_CPU_LITTLE, @@ -2286,6 +2441,15 @@ static const struct svs_platform_data svs_mt8192_platform_data = { .bank_max = ARRAY_SIZE(svs_mt8192_banks), }; +static const struct svs_platform_data svs_mt8188_platform_data = { + .name = "mt8188-svs", + .banks = svs_mt8188_banks, + .efuse_parsing = svs_mt8188_efuse_parsing, + .probe = svs_mt8192_platform_probe, + .regs = svs_regs_v2, + .bank_max = ARRAY_SIZE(svs_mt8188_banks), +}; + static const struct svs_platform_data svs_mt8183_platform_data = { .name = "mt8183-svs", .banks = svs_mt8183_banks, @@ -2299,6 +2463,9 @@ static const struct of_device_id svs_of_match[] = { { .compatible = "mediatek,mt8192-svs", .data = &svs_mt8192_platform_data, + }, { + .compatible = "mediatek,mt8188-svs", + .data = &svs_mt8188_platform_data, }, { .compatible = "mediatek,mt8183-svs", .data = &svs_mt8183_platform_data,
MT8188 svs gpu uses 2-line high bank and low bank to optimize the voltage of opp table for higher and lower frequency respectively. Signed-off-by: Mark Tseng <chun-jen.tseng@mediatek.com> --- drivers/soc/mediatek/mtk-svs.c | 177 ++++++++++++++++++++++++++++++++- 1 file changed, 172 insertions(+), 5 deletions(-)