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Lin" , Singo Chang , Nancy Lin , Shawn Sung Subject: [PATCH v2] mailbox: remove runtime GCE clk control Date: Wed, 4 Oct 2023 16:54:30 +0800 Message-ID: <20231004085430.19538-1-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--3.248200-8.000000 X-TMASE-MatchedRID: UItuaqKgrvgz+qbfieptZovNlIrJDKnMLAnNohUyMa1PL4NRV2o9aN96 V2NgrEHikTN+ni8KryeKEnrCE4DpBHDTzBSSF/pz/IBH0OAL+Ed51GakW92m5g6QlBHhBZuw5sZ TwYHfBM7hAIcJfvZAq/YYs13w9tXbmBl68mJwjOFPuMJi/ZAk8UyQ5fRSh265CqIJhrrDy2/e9i ux8ViNa29O6iLjkiESWfvheV6pyrTpRzKqh62z7KOONuzwygtG4OSJW6hGEzt+YesuCgkiXOeAO RV8mUv06bvMYoVlhNEisoGLKiuiEuVHGbcDbAq6FEUknJ/kEl7dB/CxWTRRu+rAZ8KTspSzCPth eo2hayBGreru7GmSNsJsVJfNHv8AZt3zqTfSSMnx0MnzOLGIHrcQv1kYa1q5E1GEss7kLzj+bpM aPzHLrSz9wa3yTOcyF0aD5ljt43pMcHZD6gqu7wxMjfifIXfowkvVoA11Twp+3BndfXUhXQ== X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--3.248200-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: 2022B546A6B2495E2AE4DCB7E5C1375ED94A0D183FF7F533CD2D5F0A261C6E882000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231004_020514_127683_6B23D1E8 X-CRM114-Status: GOOD ( 15.26 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org 1. GCE is a frequently used module, so runtime controlling GCE clock won't save too much power and its original design doesn't expect it to be enabled and disabled too frequently. 2. Runtime controlling GCE clock will cause display HW register configured in worng stream done event issue below: GCE should config HW in every vblanking duration. The stream done event is the start signal of vblanking. If stream done event is sent between GCE clk_disable and clk_enable. After GCE clk_enable the stream done event may not appear immediately and have about 3us delay. Normal case: clk_disable -> get EventA -> clk_enable -> clear EventA -> wait EventB -> get EventB -> config HW Abnormal case: clk_disable -> get EventA -> clk_enable -> EventA delay appear -> clear EventA fail -> wait EventB but get EventA -> config HW So just remove the runtime GCE clock contorl. Signed-off-by: Jason-JH.Lin --- v1 -> v2: 1. Rebase on Linux 6.6-rc4 2. Adjust commit message. --- drivers/mailbox/mtk-cmdq-mailbox.c | 18 +++++------------- 1 file changed, 5 insertions(+), 13 deletions(-) diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c index 4d62b07c1411..a3c2d318beb7 100644 --- a/drivers/mailbox/mtk-cmdq-mailbox.c +++ b/drivers/mailbox/mtk-cmdq-mailbox.c @@ -140,7 +140,6 @@ static void cmdq_init(struct cmdq *cmdq) int i; u32 gctl_regval = 0; - WARN_ON(clk_bulk_enable(cmdq->pdata->gce_num, cmdq->clocks)); if (cmdq->pdata->control_by_sw) gctl_regval = GCE_CTRL_BY_SW; if (cmdq->pdata->sw_ddr_en) @@ -152,7 +151,6 @@ static void cmdq_init(struct cmdq *cmdq) writel(CMDQ_THR_ACTIVE_SLOT_CYCLES, cmdq->base + CMDQ_THR_SLOT_CYCLES); for (i = 0; i <= CMDQ_MAX_EVENT; i++) writel(i, cmdq->base + CMDQ_SYNC_TOKEN_UPDATE); - clk_bulk_disable(cmdq->pdata->gce_num, cmdq->clocks); } static int cmdq_thread_reset(struct cmdq *cmdq, struct cmdq_thread *thread) @@ -283,10 +281,8 @@ static void cmdq_thread_irq_handler(struct cmdq *cmdq, break; } - if (list_empty(&thread->task_busy_list)) { + if (list_empty(&thread->task_busy_list)) cmdq_thread_disable(cmdq, thread); - clk_bulk_disable(cmdq->pdata->gce_num, cmdq->clocks); - } } static irqreturn_t cmdq_irq_handler(int irq, void *dev) @@ -333,7 +329,7 @@ static int cmdq_suspend(struct device *dev) if (cmdq->pdata->sw_ddr_en) cmdq_sw_ddr_enable(cmdq, false); - clk_bulk_unprepare(cmdq->pdata->gce_num, cmdq->clocks); + clk_bulk_disable_unprepare(cmdq->pdata->gce_num, cmdq->clocks); return 0; } @@ -342,7 +338,7 @@ static int cmdq_resume(struct device *dev) { struct cmdq *cmdq = dev_get_drvdata(dev); - WARN_ON(clk_bulk_prepare(cmdq->pdata->gce_num, cmdq->clocks)); + WARN_ON(clk_bulk_prepare_enable(cmdq->pdata->gce_num, cmdq->clocks)); cmdq->suspended = false; if (cmdq->pdata->sw_ddr_en) @@ -358,7 +354,7 @@ static int cmdq_remove(struct platform_device *pdev) if (cmdq->pdata->sw_ddr_en) cmdq_sw_ddr_enable(cmdq, false); - clk_bulk_unprepare(cmdq->pdata->gce_num, cmdq->clocks); + clk_bulk_disable_unprepare(cmdq->pdata->gce_num, cmdq->clocks); return 0; } @@ -384,8 +380,6 @@ static int cmdq_mbox_send_data(struct mbox_chan *chan, void *data) task->pkt = pkt; if (list_empty(&thread->task_busy_list)) { - WARN_ON(clk_bulk_enable(cmdq->pdata->gce_num, cmdq->clocks)); - /* * The thread reset will clear thread related register to 0, * including pc, end, priority, irq, suspend and enable. Thus @@ -457,7 +451,6 @@ static void cmdq_mbox_shutdown(struct mbox_chan *chan) } cmdq_thread_disable(cmdq, thread); - clk_bulk_disable(cmdq->pdata->gce_num, cmdq->clocks); done: /* @@ -497,7 +490,6 @@ static int cmdq_mbox_flush(struct mbox_chan *chan, unsigned long timeout) cmdq_thread_resume(thread); cmdq_thread_disable(cmdq, thread); - clk_bulk_disable(cmdq->pdata->gce_num, cmdq->clocks); out: spin_unlock_irqrestore(&thread->chan->lock, flags); @@ -631,7 +623,7 @@ static int cmdq_probe(struct platform_device *pdev) platform_set_drvdata(pdev, cmdq); - WARN_ON(clk_bulk_prepare(cmdq->pdata->gce_num, cmdq->clocks)); + WARN_ON(clk_bulk_prepare_enable(cmdq->pdata->gce_num, cmdq->clocks)); cmdq_init(cmdq);