Message ID | 20231023-display-support-v7-2-6703f3e26831@baylibre.com (mailing list archive) |
---|---|
State | New |
Headers | show
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Fri, 10 Jan 2025 05:31:23 -0800 (PST) From: Alexandre Mergnat <amergnat@baylibre.com> Date: Fri, 10 Jan 2025 14:31:12 +0100 Subject: [PATCH v7 2/6] drm/mediatek: dsi: Improves the DSI lane setup robustness MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20231023-display-support-v7-2-6703f3e26831@baylibre.com> References: <20231023-display-support-v7-0-6703f3e26831@baylibre.com> In-Reply-To: <20231023-display-support-v7-0-6703f3e26831@baylibre.com> To: Chun-Kuang Hu <chunkuang.hu@kernel.org>, Philipp Zabel <p.zabel@pengutronix.de>, Maarten Lankhorst <maarten.lankhorst@linux.intel.com>, Maxime Ripard <mripard@kernel.org>, Thomas Zimmermann <tzimmermann@suse.de>, David Airlie <airlied@gmail.com>, Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley <conor+dt@kernel.org>, Matthias Brugger <matthias.bgg@gmail.com>, AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>, Jitao Shi <jitao.shi@mediatek.com>, CK Hu <ck.hu@mediatek.com>, Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org>, Simona Vetter <simona@ffwll.ch>, Simona Vetter <simona.vetter@ffwll.ch> Cc: dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Alexandre Mergnat <amergnat@baylibre.com> X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; 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Series |
Add display support for the MT8365-EVK board
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expand
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diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c index e61b9bc68e9a..dcf0d93881b5 100644 --- a/drivers/gpu/drm/mediatek/mtk_dsi.c +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c @@ -724,6 +724,8 @@ static int mtk_dsi_poweron(struct mtk_dsi *dsi) mtk_dsi_config_vdo_timing(dsi); mtk_dsi_set_interrupt_enable(dsi); + dsi->lanes_ready = false; + return 0; err_disable_engine_clk: clk_disable_unprepare(dsi->engine_clk);
Currently, mtk_dsi_lane_ready (which setup the DSI lane) is triggered before mtk_dsi_poweron. lanes_ready flag toggle to true during mtk_dsi_lane_ready function, and the DSI module is set up during mtk_dsi_poweron. Later, during panel driver init, mtk_dsi_lane_ready is triggered but does nothing because lanes are considered ready. Unfortunately, when the panel driver try to communicate, the DSI returns a timeout. The solution found here is to put lanes_ready flag to false after the DSI module setup into mtk_dsi_poweron to init the DSI lanes after the power / setup of the DSI module. Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> --- drivers/gpu/drm/mediatek/mtk_dsi.c | 2 ++ 1 file changed, 2 insertions(+)