| Message ID | 20231117074926.10824-1-zajec5@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | dt-bindings: arm: mediatek: convert ethsys controller to the json-schema | expand |
On Fri, Nov 17, 2023 at 08:49:26AM +0100, Rafał Miłecki wrote: > From: Rafał Miłecki <rafal@milecki.pl> > > This helps validating DTS files. The only introduced change was fixing > "reg" value in example (1 address cell + 1 size cell). > > Signed-off-by: Rafał Miłecki <rafal@milecki.pl> > --- > For the record I was trying to simplify "compatible" syntax with > following but "oneOf" apparently can't be used as a single item. > > items: > - oneOf: > - const: mediatek,mt2701-ethsys > - const: mediatek,mt7622-ethsys > - items: > - const: mediatek,mt7623-ethsys > - const: mediatek,mt2701-ethsys > - const: mediatek,mt7629-ethsys > - const: mediatek,mt7981-ethsys > - const: mediatek,mt7986-ethsys > - const: syscon The problem is you have nested 'items' which forms a matrix. You generally need a 'oneOf' for each possible length of an array unless the value of each index is always the same (i.e. only the size of the list varies). > > .../bindings/arm/mediatek/mediatek,ethsys.txt | 29 ---------- > .../arm/mediatek/mediatek,ethsys.yaml | 54 +++++++++++++++++++ > 2 files changed, 54 insertions(+), 29 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.txt > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.yaml Can you move this to bindings/clock/ With that, Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.txt deleted file mode 100644 index eccd4b706a78..000000000000 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.txt +++ /dev/null @@ -1,29 +0,0 @@ -Mediatek ethsys controller -============================ - -The Mediatek ethsys controller provides various clocks to the system. - -Required Properties: - -- compatible: Should be: - - "mediatek,mt2701-ethsys", "syscon" - - "mediatek,mt7622-ethsys", "syscon" - - "mediatek,mt7623-ethsys", "mediatek,mt2701-ethsys", "syscon" - - "mediatek,mt7629-ethsys", "syscon" - - "mediatek,mt7981-ethsys", "syscon" - - "mediatek,mt7986-ethsys", "syscon" -- #clock-cells: Must be 1 -- #reset-cells: Must be 1 - -The ethsys controller uses the common clk binding from -Documentation/devicetree/bindings/clock/clock-bindings.txt -The available clocks are defined in dt-bindings/clock/mt*-clk.h. - -Example: - -ethsys: clock-controller@1b000000 { - compatible = "mediatek,mt2701-ethsys", "syscon"; - reg = <0 0x1b000000 0 0x1000>; - #clock-cells = <1>; - #reset-cells = <1>; -}; diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.yaml new file mode 100644 index 000000000000..a85d7b632d12 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,ethsys.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek ethsys controller + +description: + The available clocks are defined in dt-bindings/clock/mt*-clk.h. + +maintainers: + - James Liao <jamesjj.liao@mediatek.com> + +properties: + compatible: + oneOf: + - items: + - enum: + - mediatek,mt2701-ethsys + - mediatek,mt7622-ethsys + - mediatek,mt7629-ethsys + - mediatek,mt7981-ethsys + - mediatek,mt7986-ethsys + - const: syscon + - items: + - const: mediatek,mt7623-ethsys + - const: mediatek,mt2701-ethsys + - const: syscon + + reg: + maxItems: 1 + + "#clock-cells": + const: 1 + + "#reset-cells": + const: 1 + +required: + - reg + - "#clock-cells" + - "#reset-cells" + +additionalProperties: false + +examples: + - | + clock-controller@1b000000 { + compatible = "mediatek,mt2701-ethsys", "syscon"; + reg = <0x1b000000 0x1000>; + #clock-cells = <1>; + #reset-cells = <1>; + };