[v4] PCI: mediatek: Clear interrupt status before dispatching handler

Commit Message

Jianjun Wang (王建军) Dec. 11, 2023, 9:49 a.m. UTC

From: qizhong cheng <[e-mail]>

We found a failure when used iperf tool for wifi performance testing,
there are some MSIs received while clearing the interrupt status,
these MSIs cannot be serviced.

The interrupt status can be cleared even the MSI status still remaining,
as an edge-triggered interrupts, its interrupt status should be cleared
before dispatching to the handler of device.

Fixes: 43e6409db64d ("PCI: mediatek: Add MSI support for MT2712 and MT7622")
Signed-off-by: qizhong cheng <[e-mail]>
Signed-off-by: Jianjun Wang <[e-mail]>
Reviewed-by: AngeloGioacchino Del Regno <[e-mail]>
Cc: [e-mail]
---
v4:
 - Found that this patch has not been merged, resending it as v4.

v3:
 - Add Fix tag.

v2:
 - Update the subject line.
 - Improve the commit log and code comments.
---
 drivers/pci/controller/pcie-mediatek.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

Comments

Krzysztof Wilczyński Jan. 8, 2024, 2:30 p.m. UTC | #1

Hello,

> We found a failure when used iperf tool for wifi performance testing,
> there are some MSIs received while clearing the interrupt status,
> these MSIs cannot be serviced.
> 
> The interrupt status can be cleared even the MSI status still remaining,
> as an edge-triggered interrupts, its interrupt status should be cleared
> before dispatching to the handler of device.

Applied to controller/mediatek, thank you!

[1/1] PCI: mediatek: Clear interrupt status before dispatching handler
      https://git.kernel.org/pci/pci/c/4fea201e110e

	Krzysztof

Patch

diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c
index 66a8f73296fc..3fb7f08de061 100644
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
@@ -617,12 +617,17 @@  static void mtk_pcie_intr_handler(struct irq_desc *desc)
 		if (status & MSI_STATUS){
 			unsigned long imsi_status;
 
+			/*
+			 * The interrupt status can be cleared even the MSI
+			 * status still remaining, hence as an edge-triggered
+			 * interrupts, its interrupt status should be cleared
+			 * before dispatching handler.
+			 */
+			writel(MSI_STATUS, port->base + PCIE_INT_STATUS);
 			while ((imsi_status = readl(port->base + PCIE_IMSI_STATUS))) {
 				for_each_set_bit(bit, &imsi_status, MTK_MSI_IRQS_NUM)
 					generic_handle_domain_irq(port->inner_domain, bit);
 			}
-			/* Clear MSI interrupt status */
-			writel(MSI_STATUS, port->base + PCIE_INT_STATUS);
 		}
 	}