From patchwork Wed Jan 17 10:28:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= X-Patchwork-Id: 13521579 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BE7DCC47258 for ; Wed, 17 Jan 2024 10:29:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=zfeP++ce84dD1NKgVgvHGZi5163rCfdKWO3hg8LgOVI=; b=nJhjpvzHyUG+9OsRZCOHDuXuls dp0sxUbFFeYw3lJQE0TGOdCkYa7K2PpGwjWVdSHlgEfb1uRCjr/NwpGo0vrmyxdjcRBGj+SH9HZgZ DA3X5G2rasV6EZ1KqdHlI3n9E8uPncDLOAyxqkvnXG87+VelpMRuJExVBm3s3G9y12fYBmw4nUDgD wAGwaveAsRHlkO5qTX+MdxzZcwC8LTPEVUqHqZloyyckQBYq4jM5qG9ziBE+AT1TfHM6TTOGTQUe4 dc96Xip2XuUjws7gPcpglSVUr6hYTO5KLjGFfEzycn1YZE3klXy1NRKtm1KoCiYto291xiaYnZwuT l3fAvCJg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rQ3AU-00FGq4-1v; Wed, 17 Jan 2024 10:29:10 +0000 Received: from relay2-d.mail.gandi.net ([2001:4b98:dc4:8::222]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rQ3AP-00FGn2-1o; Wed, 17 Jan 2024 10:29:06 +0000 Received: by mail.gandi.net (Postfix) with ESMTPSA id DC18C40011; Wed, 17 Jan 2024 10:28:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=arinc9.com; s=gm1; t=1705487343; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=zfeP++ce84dD1NKgVgvHGZi5163rCfdKWO3hg8LgOVI=; b=N32HXSuy1FlHbm8WyQDHEDDv+uuPBFcXr2Bi+LQhw2GFP3ElffuZ/Xiv3dXLDxgp6aS9N7 UMzFd4ZwST898UyPfVXPpCcdmqAOrlJoTOER5tSGNFSiockd2+WkceaWkBlIF93/dqsLws GG+wLuxlSOQj5ZpbMnsjbP3eWvkkGVi6DlLvESr1Si4pFc1iZOCGUKJNnZgyl2hVBpAzIp R95oluJ7Hdp3vEP4gGYMVBVZhpBabXsNQXvZwtFtMjjXQinyU/gyawz1ZegFqcucszBWmg /jEEF9YsZHKV9Ly5sh3nXk5kHct1271wv4izVbcGH5Vg8YgbHuGkh5C4kqi6vQ== From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= To: Daniel Golle , Landen Chao , DENG Qingfang , Sean Wang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= , mithat.guner@xeront.com, erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 3/8] net: dsa: mt7530: do not use SW_PHY_RST to reset MT7531 switch Date: Wed, 17 Jan 2024 13:28:33 +0300 Message-Id: <20240117102838.57445-4-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240117102838.57445-1-arinc.unal@arinc9.com> References: <20240117102838.57445-1-arinc.unal@arinc9.com> MIME-Version: 1.0 X-GND-Sasl: arinc.unal@arinc9.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240117_022905_762762_9ED42F09 X-CRM114-Status: GOOD ( 12.02 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org According to the document MT7531 Reference Manual for Development Board v1.0, the SW_PHY_RST bit on the SYS_CTRL register doesn't exist for MT7531. This is likely why forcing link down on all ports is necessary for MT7531. Therefore, do not set SW_PHY_RST on mt7531_setup(). Signed-off-by: Arınç ÜNAL --- drivers/net/dsa/mt7530.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index d2e861361191..a43178b62817 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -2434,14 +2434,12 @@ mt7531_setup(struct dsa_switch *ds) val = mt7530_read(priv, MT7531_TOP_SIG_SR); priv->p5_sgmii = !!(val & PAD_DUAL_SGMII_EN); - /* all MACs must be forced link-down before sw reset */ + /* Force link down on all ports before internal reset */ for (i = 0; i < MT7530_NUM_PORTS; i++) mt7530_write(priv, MT7530_PMCR_P(i), MT7531_FORCE_LNK); /* Reset the switch through internal reset */ - mt7530_write(priv, MT7530_SYS_CTRL, - SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST | - SYS_CTRL_REG_RST); + mt7530_write(priv, MT7530_SYS_CTRL, SYS_CTRL_SW_RST | SYS_CTRL_REG_RST); if (!priv->p5_sgmii) { mt7531_pll_setup(priv);