From patchwork Thu Feb 1 18:24:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 13541626 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2D8D2C4828D for ; Thu, 1 Feb 2024 18:24:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-Id:Date :Subject:To:From:Reply-To:Content-Type:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=jawm/pvTHWX0WYgxucSztSNdUiVaRemAzUoNvh+bK2k=; b=V9quGybzPzX062 6zCYf/FfIHKU1G4oJiqfSs8VgZUtmYn5t/DboxSjza1qcihuo7KQQDBSQMw9dLrnlxkyynttfUWKp WbJeXswnGR4aO6rd2MTqGcw6610GW5fmilome8J+0ksRn2uN9KrM5/0F7FKmK+nUAH9/N9GsGqHHr E8U+I6vtcn4Ud+9lBM3TPo8UziD/b7FURz1wiTmT044HESkNAixQyvRCAaWAA9NMWdWIMbPdjloKL xLsIzURGK+nGqbgD1G5o57eLT2APiL7Tx6B7xJWu1TJbPV21r9hmG2AQ9sPSlZ9YwQ5cwx/lD4KCh gwY2G6fzc0S288AS/PQw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rVbjh-000000090Bt-2nOM; Thu, 01 Feb 2024 18:24:29 +0000 Received: from mxout4.routing.net ([2a03:2900:1:a::9]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rVbjb-0000000906B-0IwT; Thu, 01 Feb 2024 18:24:24 +0000 Received: from mxbox1.masterlogin.de (unknown [192.168.10.88]) by mxout4.routing.net (Postfix) with ESMTP id B9F2A1007E6; Thu, 1 Feb 2024 18:24:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1706811857; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=jawm/pvTHWX0WYgxucSztSNdUiVaRemAzUoNvh+bK2k=; b=eGCnhr4HzH1KvYXRdshr8/vanq39eYij3BPDTAORTAZcoNqtCFZPijY9q47tbwMmLj9Dxy 0tDwX1YB89ZRx6pnDJQHiIN5s7GAyBBDb9uh19MSPpdQnJCj+ZSxaWY+SLar+npGuRJVoM C+BtmDpofNko99cObq8sly+CbGratwo= Received: from frank-G5.. (fttx-pool-217.61.148.248.bambit.de [217.61.148.248]) by mxbox1.masterlogin.de (Postfix) with ESMTPSA id D30CC40533; Thu, 1 Feb 2024 18:24:16 +0000 (UTC) From: Frank Wunderlich To: Michael Turquette , Stephen Boyd , Matthias Brugger , AngeloGioacchino Del Regno , Philipp Zabel , Rob Herring , Krzysztof Kozlowski , Conor Dooley Subject: [PATCH v4 2/2] clk: mediatek: add infracfg reset controller for mt7988 Date: Thu, 1 Feb 2024 19:24:09 +0100 Message-Id: <20240201182409.39878-3-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240201182409.39878-1-linux@fw-web.de> References: <20240201182409.39878-1-linux@fw-web.de> MIME-Version: 1.0 X-Mail-ID: 55057060-11c3-4130-9e0b-b79a9f6df589 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240201_102423_496744_16025B82 X-CRM114-Status: GOOD ( 12.20 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Sam Shih , Daniel Golle , linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: Frank Wunderlich Infracfg can also operate as reset controller, add support for it. Signed-off-by: Frank Wunderlich Reviewed-by: AngeloGioacchino Del Regno --- v4: unchanged v3: - start with RST0 (LVTS is in RST1) - rename reset offset to contain SOC to not collide with constants defined in reset.h --- drivers/clk/mediatek/clk-mt7988-infracfg.c | 23 ++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/clk/mediatek/clk-mt7988-infracfg.c b/drivers/clk/mediatek/clk-mt7988-infracfg.c index 8011ef278bea..449041f8abbc 100644 --- a/drivers/clk/mediatek/clk-mt7988-infracfg.c +++ b/drivers/clk/mediatek/clk-mt7988-infracfg.c @@ -14,6 +14,10 @@ #include "clk-gate.h" #include "clk-mux.h" #include +#include + +#define MT7988_INFRA_RST0_SET_OFFSET 0x70 +#define MT7988_INFRA_RST1_SET_OFFSET 0x80 static DEFINE_SPINLOCK(mt7988_clk_lock); @@ -249,12 +253,31 @@ static const struct mtk_gate infra_clks[] = { GATE_INFRA3(CLK_INFRA_133M_PCIE_CK_P3, "infra_133m_pcie_ck_p3", "sysaxi_sel", 31), }; +static u16 infra_rst_ofs[] = { + MT7988_INFRA_RST0_SET_OFFSET, + MT7988_INFRA_RST1_SET_OFFSET, +}; + +static u16 infra_idx_map[] = { + [MT7988_INFRA_RST0_PEXTP_MAC_SWRST] = 0 * RST_NR_PER_BANK + 6, + [MT7988_INFRA_RST1_THERM_CTRL_SWRST] = 1 * RST_NR_PER_BANK + 9, +}; + +static struct mtk_clk_rst_desc infra_rst_desc = { + .version = MTK_RST_SET_CLR, + .rst_bank_ofs = infra_rst_ofs, + .rst_bank_nr = ARRAY_SIZE(infra_rst_ofs), + .rst_idx_map = infra_idx_map, + .rst_idx_map_nr = ARRAY_SIZE(infra_idx_map), +}; + static const struct mtk_clk_desc infra_desc = { .clks = infra_clks, .num_clks = ARRAY_SIZE(infra_clks), .mux_clks = infra_muxes, .num_mux_clks = ARRAY_SIZE(infra_muxes), .clk_lock = &mt7988_clk_lock, + .rst_desc = &infra_rst_desc, }; static const struct of_device_id of_match_clk_mt7988_infracfg[] = {