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Fri, 08 Mar 2024 00:03:20 -0700 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 8 Mar 2024 15:02:43 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 8 Mar 2024 15:02:43 +0800 From: To: , , , , CC: , , , , , , , , , , , , , , Subject: [PATCH v1 3/7] ufs: host: mediatek: Add UFS_MTK_CAP_DISABLE_MCQ Date: Fri, 8 Mar 2024 15:02:37 +0800 Message-ID: <20240308070241.9163-4-peter.wang@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240308070241.9163-1-peter.wang@mediatek.com> References: <20240308070241.9163-1-peter.wang@mediatek.com> MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--9.664600-8.000000 X-TMASE-MatchedRID: eim6YYjnci0MQLXc2MGSbNIKqYKXY3SWMZm0+sEE9mtnnK6mXN72myCX Mf8jB8MxNF7ugkXaLcairLZc9CxEZNLDec/x7CA8H5YQyOg71ZZMkOX0UoduuQqiCYa6w8tvlUN mxPSthYIULfbRmZ/onHhbWkjJzPSiFm2HuAZVgfZfwzQfOH01PDJcsSAcBZLamyiLZetSf8mfop 0ytGwvXiq2rl3dzGQ1NvlZHTMWqVxPZ6n/jSr7LVNOTDMCNRY2lJms31GF30kR7M+mkS6mNg== X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--9.664600-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: F505CFF517C54E71D043184C7A7E5DD743EAE2BE6E58E62FB7900B28F3D242BB2000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240307_230326_475791_49B3171F X-CRM114-Status: GOOD ( 11.85 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: Peter Wang From: Po-Wen Kao Add new mediatek host cap UFS_MTK_CAP_DISABLE_MCQ to allow disable MCQ feature by assigning dts boolean property "mediatek,ufs-disable-mcq"" Reviewed-by: Peter Wang Signed-off-by: Peter Wang Signed-off-by: Po-Wen Kao Reviewed-by: Avri Altman Acked-by: Chun-Hung Wu --- drivers/ufs/host/ufs-mediatek.c | 12 ++++++++++++ drivers/ufs/host/ufs-mediatek.h | 1 + 2 files changed, 13 insertions(+) diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c index 0262e8994236..cdf29cfa490b 100644 --- a/drivers/ufs/host/ufs-mediatek.c +++ b/drivers/ufs/host/ufs-mediatek.c @@ -640,6 +640,9 @@ static void ufs_mtk_init_host_caps(struct ufs_hba *hba) if (of_property_read_bool(np, "mediatek,ufs-tx-skew-fix")) host->caps |= UFS_MTK_CAP_TX_SKEW_FIX; + if (of_property_read_bool(np, "mediatek,ufs-disable-mcq")) + host->caps |= UFS_MTK_CAP_DISABLE_MCQ; + dev_info(hba->dev, "caps: 0x%x", host->caps); } @@ -874,6 +877,9 @@ static void ufs_mtk_init_mcq_irq(struct ufs_hba *hba) host->mcq_nr_intr = UFSHCD_MAX_Q_NR; pdev = container_of(hba->dev, struct platform_device, dev); + if (host->caps & UFS_MTK_CAP_DISABLE_MCQ) + goto failed; + for (i = 0; i < host->mcq_nr_intr; i++) { /* irq index 0 is legacy irq, sq/cq irq start from index 1 */ irq = platform_get_irq(pdev, i + 1); @@ -1585,6 +1591,12 @@ static int ufs_mtk_clk_scale_notify(struct ufs_hba *hba, bool scale_up, static int ufs_mtk_get_hba_mac(struct ufs_hba *hba) { + struct ufs_mtk_host *host = ufshcd_get_variant(hba); + + /* MCQ operation not permitted */ + if (host->caps & UFS_MTK_CAP_DISABLE_MCQ) + return -EPERM; + return MAX_SUPP_MAC; } diff --git a/drivers/ufs/host/ufs-mediatek.h b/drivers/ufs/host/ufs-mediatek.h index 146c25080599..79c64de25254 100644 --- a/drivers/ufs/host/ufs-mediatek.h +++ b/drivers/ufs/host/ufs-mediatek.h @@ -143,6 +143,7 @@ enum ufs_mtk_host_caps { UFS_MTK_CAP_ALLOW_VCCQX_LPM = 1 << 5, UFS_MTK_CAP_PMC_VIA_FASTAUTO = 1 << 6, UFS_MTK_CAP_TX_SKEW_FIX = 1 << 7, + UFS_MTK_CAP_DISABLE_MCQ = 1 << 8, }; struct ufs_mtk_crypt_cfg {