Message ID | 20240308155616.11742-3-justin.swartz@risingedge.co.za (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Extend devicetree coverage of MT7621's UART interfaces | expand |
On 08/03/2024 18:56, Justin Swartz wrote: > Reorder serial0 properties according to the guidelines laid > out in Documentation/devicetree/bindings/dts-coding-style.rst > > Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za> Reviewed-by: Arınç ÜNAL <arinc.unal@arinc9.com> Arınç
diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi index dca415fdd..68467fca3 100644 --- a/arch/mips/boot/dts/ralink/mt7621.dtsi +++ b/arch/mips/boot/dts/ralink/mt7621.dtsi @@ -115,13 +115,14 @@ serial0: serial@c00 { compatible = "ns16550a"; reg = <0xc00 0x100>; + reg-io-width = <4>; + reg-shift = <2>; + clocks = <&sysc MT7621_CLK_UART1>; interrupt-parent = <&gic>; interrupts = <GIC_SHARED 26 IRQ_TYPE_LEVEL_HIGH>; - reg-shift = <2>; - reg-io-width = <4>; no-loopback-test; pinctrl-names = "default";