| Message ID | 20240606092635.27981-11-shawn.sung@mediatek.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Support IGT in display driver | expand |
Hi, Shawn: On Thu, 2024-06-06 at 17:26 +0800, Shawn Sung wrote: > From: Hsiao Chien Sung <shawn.sung@mediatek.com> > > Support "None" alpha blending mode on MediaTek's chips. > > Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_ethdr.c | 14 ++++++++++++-- > 1 file changed, 12 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c b/drivers/gpu/drm/mediatek/mtk_ethdr.c > index 4ffd0a064861..bcced62e455d 100644 > --- a/drivers/gpu/drm/mediatek/mtk_ethdr.c > +++ b/drivers/gpu/drm/mediatek/mtk_ethdr.c > @@ -3,6 +3,7 @@ > * Copyright (c) 2021 MediaTek Inc. > */ > > +#include <drm/drm_blend.h> > #include <drm/drm_fourcc.h> > #include <drm/drm_framebuffer.h> > #include <linux/clk.h> > @@ -154,6 +155,7 @@ void mtk_ethdr_layer_config(struct device *dev, unsigned int idx, > unsigned int offset = (pending->x & 1) << 31 | pending->y << 16 | pending->x; > unsigned int align_width = ALIGN_DOWN(pending->width, 2); > unsigned int alpha_con = 0; > + bool replace_src_a = false; > > dev_dbg(dev, "%s+ idx:%d", __func__, idx); > > @@ -173,8 +175,16 @@ void mtk_ethdr_layer_config(struct device *dev, unsigned int idx, > if (state->base.fb && state->base.fb->format->has_alpha) > alpha_con = MIXER_ALPHA_AEN | MIXER_ALPHA; > > - mtk_mmsys_mixer_in_config(priv->mmsys_dev, idx + 1, alpha_con ? false : true, > - DEFAULT_9BIT_ALPHA, > + if (state->base.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE || > + (state->base.fb && !state->base.fb->format->has_alpha)) { > + /* > + * Mixer doesn't support CONST_BLD mode, > + * use a trick to make the output equivalent > + */ > + replace_src_a = true; > + } > + > + mtk_mmsys_mixer_in_config(priv->mmsys_dev, idx + 1, replace_src_a, MIXER_ALPHA, It seems originally replace source alpha with 9 bits constant alpha, but this patch change to 8 bits constant alpha. Changing from 9 bits to 8 bits is not related to this patch, so separate it to another patch. Regards, CK > pending->x & 1 ? MIXER_INX_MODE_EVEN_EXTEND : > MIXER_INX_MODE_BYPASS, align_width / 2 - 1, cmdq_pkt); > > -- > 2.18.0 > >
diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c b/drivers/gpu/drm/mediatek/mtk_ethdr.c index 4ffd0a064861..bcced62e455d 100644 --- a/drivers/gpu/drm/mediatek/mtk_ethdr.c +++ b/drivers/gpu/drm/mediatek/mtk_ethdr.c @@ -3,6 +3,7 @@ * Copyright (c) 2021 MediaTek Inc. */ +#include <drm/drm_blend.h> #include <drm/drm_fourcc.h> #include <drm/drm_framebuffer.h> #include <linux/clk.h> @@ -154,6 +155,7 @@ void mtk_ethdr_layer_config(struct device *dev, unsigned int idx, unsigned int offset = (pending->x & 1) << 31 | pending->y << 16 | pending->x; unsigned int align_width = ALIGN_DOWN(pending->width, 2); unsigned int alpha_con = 0; + bool replace_src_a = false; dev_dbg(dev, "%s+ idx:%d", __func__, idx); @@ -173,8 +175,16 @@ void mtk_ethdr_layer_config(struct device *dev, unsigned int idx, if (state->base.fb && state->base.fb->format->has_alpha) alpha_con = MIXER_ALPHA_AEN | MIXER_ALPHA; - mtk_mmsys_mixer_in_config(priv->mmsys_dev, idx + 1, alpha_con ? false : true, - DEFAULT_9BIT_ALPHA, + if (state->base.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE || + (state->base.fb && !state->base.fb->format->has_alpha)) { + /* + * Mixer doesn't support CONST_BLD mode, + * use a trick to make the output equivalent + */ + replace_src_a = true; + } + + mtk_mmsys_mixer_in_config(priv->mmsys_dev, idx + 1, replace_src_a, MIXER_ALPHA, pending->x & 1 ? MIXER_INX_MODE_EVEN_EXTEND : MIXER_INX_MODE_BYPASS, align_width / 2 - 1, cmdq_pkt);