From patchwork Thu Jun 6 09:26:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?U2hhd24gU3VuZyAo5a6L5a2d6KyZKQ==?= X-Patchwork-Id: 13688146 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2A203C25B75 for ; Thu, 6 Jun 2024 09:27:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Ly4e+mOLK27K/vtVWLdo/IetBGFPRRL5ZpSjzikpF4E=; b=uhMqTAebGqIsnT755DmVgd6DPJ ZIyf9BQKc/yAHAw8YXMPu7HjkusaptNKdRTvWi19fOgJdAHteIIKo2AKUy5wGq1qCTG+ae+SWKB5n JL5RPhoe3/3KwEIqd7YI96RMnt23LgXAV03FlTi2Nut4cJWB/Jpykxd/82ej5SLP+h4C2v66tYCdj 248UKIjTQ/F3hZDf3aPkccxmJ7AsxDu/EtEPUYiabJj0vleClOc/LTdFWGmeqttSqpkP0SewgRVGw N4rS3UsuL2ig+PT13oKJVqUcqf8IfsKXCASdZe8+lKvPRkGVPk6WAmcFfcAEp5RBXIfUSkYvLsmR9 +nC5sUFQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sF9Oz-00000009AD5-1Db1; Thu, 06 Jun 2024 09:27:21 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sF9OQ-000000099eG-2Pss; Thu, 06 Jun 2024 09:26:50 +0000 X-UUID: e142672423e611efba8bfb22b0451c12-20240606 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=Ly4e+mOLK27K/vtVWLdo/IetBGFPRRL5ZpSjzikpF4E=; b=R26XsV8Teaq1bnoTOVqLwDZMFTzWZYC9+gyUm4pZ64VkSYI/Vg8Gkz0VaEmhhQ/0cIaE04xGEIuiN2GkL0lq0MzKxtYfYPlxoFZE2xE+YK65JHoBqyyYWWWx80J52ETYVDMNYW4ZOKvIBJy1m27F8Ap/tKXbZ68GHv6Nc4xKm1U=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.39,REQID:84ab301e-7f88-4834-adb4-15d058ead682,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:393d96e,CLOUDID:58d24988-8d4f-477b-89d2-1e3bdbef96d1,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1, SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: e142672423e611efba8bfb22b0451c12-20240606 Received: from mtkmbs13n2.mediatek.inc [(172.21.101.108)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 466012403; Thu, 06 Jun 2024 02:26:40 -0700 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs13n1.mediatek.inc (172.21.101.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Thu, 6 Jun 2024 17:26:38 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Thu, 6 Jun 2024 17:26:38 +0800 From: Shawn Sung To: Chun-Kuang Hu Subject: [PATCH v8 12/16] drm/mediatek: Support "Pre-multiplied" blending in Mixer Date: Thu, 6 Jun 2024 17:26:31 +0800 Message-ID: <20240606092635.27981-13-shawn.sung@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240606092635.27981-1-shawn.sung@mediatek.com> References: <20240606092635.27981-1-shawn.sung@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240606_022646_819184_CAF43525 X-CRM114-Status: GOOD ( 12.32 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniel Vetter , Sean Paul , Jason Chen , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, CK Hu , "Nancy . Lin" , linux-mediatek@lists.infradead.org, Bibby Hsieh , Matthias Brugger , Philipp Zabel , Hsiao Chien Sung , David Airlie , linux-arm-kernel@lists.infradead.org, AngeloGioacchino Del Regno Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: Hsiao Chien Sung Support "Pre-multiplied" alpha blending mode in Mixer. Before this patch, only the coverage mode is supported. Signed-off-by: Hsiao Chien Sung --- drivers/gpu/drm/mediatek/mtk_ethdr.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c b/drivers/gpu/drm/mediatek/mtk_ethdr.c index bcced62e455d..d01f65819816 100644 --- a/drivers/gpu/drm/mediatek/mtk_ethdr.c +++ b/drivers/gpu/drm/mediatek/mtk_ethdr.c @@ -6,6 +6,7 @@ #include #include #include +#include #include #include #include @@ -36,6 +37,7 @@ #define MIX_SRC_L0_EN BIT(0) #define MIX_L_SRC_CON(n) (0x28 + 0x18 * (n)) #define NON_PREMULTI_SOURCE (2 << 12) +#define PREMULTI_SOURCE (3 << 12) #define MIX_L_SRC_SIZE(n) (0x30 + 0x18 * (n)) #define MIX_L_SRC_OFFSET(n) (0x34 + 0x18 * (n)) #define MIX_FUNC_DCM0 0x120 @@ -172,8 +174,12 @@ void mtk_ethdr_layer_config(struct device *dev, unsigned int idx, return; } - if (state->base.fb && state->base.fb->format->has_alpha) - alpha_con = MIXER_ALPHA_AEN | MIXER_ALPHA; + alpha_con |= MIXER_ALPHA_AEN | (state->base.alpha & MIXER_ALPHA); + + if (state->base.pixel_blend_mode != DRM_MODE_BLEND_COVERAGE) + alpha_con |= PREMULTI_SOURCE; + else + alpha_con |= NON_PREMULTI_SOURCE; if (state->base.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE || (state->base.fb && !state->base.fb->format->has_alpha)) { @@ -191,8 +197,7 @@ void mtk_ethdr_layer_config(struct device *dev, unsigned int idx, mtk_ddp_write(cmdq_pkt, pending->height << 16 | align_width, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_SIZE(idx)); mtk_ddp_write(cmdq_pkt, offset, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_OFFSET(idx)); - mtk_ddp_write_mask(cmdq_pkt, alpha_con, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_CON(idx), - 0x1ff); + mtk_ddp_write(cmdq_pkt, alpha_con, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_CON(idx)); mtk_ddp_write_mask(cmdq_pkt, BIT(idx), &mixer->cmdq_base, mixer->regs, MIX_SRC_CON, BIT(idx)); }