Message ID | 20240616-mediatek-drm-next-v1-12-7e8f9cf785d8@mediatek.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Fix the errors of MediaTek display driver found by IGT | expand |
Il 16/06/24 10:29, Hsiao Chien Sung via B4 Relay ha scritto: > From: Hsiao Chien Sung <shawn.sung@mediatek.com> > > Set the plane alpha according to DRM plane property. > > Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com> > Reviewed-by: CK Hu <ck.hu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c index 33b58da15ba4..f358dbfed5e3 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c @@ -450,8 +450,10 @@ void mtk_ovl_layer_config(struct device *dev, unsigned int idx, } con = ovl_fmt_convert(ovl, fmt); - if (state->base.fb && state->base.fb->format->has_alpha) - con |= OVL_CON_AEN | OVL_CON_ALPHA; + if (state->base.fb) { + con |= OVL_CON_AEN; + con |= state->base.alpha & OVL_CON_ALPHA; + } /* CONST_BLD must be enabled for XRGB formats although the alpha channel * can be ignored, or OVL will still read the value from memory.