Message ID | 20240819-drm-fixup-0819-v2-1-a03580ece3ec@mediatek.com (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | [v2] drm/mediatek: Fix missing configuration flags in mtk_crtc_ddp_config() | expand |
Hi, Jason: On Mon, 2024-08-19 at 23:25 +0800, Jason-JH.Lin via B4 Relay wrote: > > External email : Please do not click links or open attachments until you have verified the sender or the content. > From: "Jason-JH.Lin" <jason-jh.lin@mediatek.com> > > In mtk_crtc_ddp_config(), mtk_crtc will use some configuration flags to > generate instructions to cmdq_handle, such as: > state->pending_config > mtk_crtc->pending_planes > plane_state->pending.config > mtk_crtc->pending_async_planes > plane_state->pending.async_config > > These configuration flags may be set to false when a GCE IRQ comes calling > ddp_cmdq_cb(). This may result in missing prepare instructions, > especially if mtk_crtc_update_config() with the flase need_vblank (no need > to wait for vblank) cases. > > Therefore, the mtk_crtc->config_updating flag is set at the beginning of > mtk_crtc_update_config() to ensure that these configuration flags won't be > changed when the mtk_crtc_ddp_config() is preparing instructions. > But somehow the ddp_cmdq_cb() didn't use the mtk_crtc->config_updating > flag to prevent those pending config flags from being cleared. > > To avoid missing the configuration when generating the config instruction, > the config_updating flag should be added into ddp_cmdq_cb() and be > protected with spin_lock. Reviewed-by: CK Hu <ck.hu@mediatek.com> > > Fixes: 7f82d9c43879 ("drm/mediatek: Clear pending flag when cmdq packet is done") > Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com> > --- > Change in v2: > Add spin_lock protection for config_updating flag. > --- > drivers/gpu/drm/mediatek/mtk_crtc.c | 24 ++++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_crtc.c b/drivers/gpu/drm/mediatek/mtk_crtc.c > index 6f34f573e127..b752c0b46383 100644 > --- a/drivers/gpu/drm/mediatek/mtk_crtc.c > +++ b/drivers/gpu/drm/mediatek/mtk_crtc.c > @@ -69,6 +69,8 @@ struct mtk_crtc { > /* lock for display hardware access */ > struct mutexhw_lock; > boolconfig_updating; > +/* lock for config_updating to cmd buffer */ > +spinlock_tconfig_lock; > }; > > struct mtk_crtc_state { > @@ -107,10 +109,13 @@ static void mtk_crtc_finish_page_flip(struct mtk_crtc *mtk_crtc) > static void mtk_drm_finish_page_flip(struct mtk_crtc *mtk_crtc) > { > drm_crtc_handle_vblank(&mtk_crtc->base); > + > +spin_lock(&mtk_crtc->config_lock); > if (!mtk_crtc->config_updating && mtk_crtc->pending_needs_vblank) { > mtk_crtc_finish_page_flip(mtk_crtc); > mtk_crtc->pending_needs_vblank = false; > } > +spin_unlock(&mtk_crtc->config_lock); > } > > #if IS_REACHABLE(CONFIG_MTK_CMDQ) > @@ -314,6 +319,13 @@ static void ddp_cmdq_cb(struct mbox_client *cl, void *mssg) > > state = to_mtk_crtc_state(mtk_crtc->base.state); > > +spin_lock(&mtk_crtc->config_lock); > + > +if (mtk_crtc->config_updating) { > +spin_unlock(&mtk_crtc->config_lock); > +goto ddp_cmdq_cb_out; > +} > + > state->pending_config = false; > > if (mtk_crtc->pending_planes) { > @@ -340,6 +352,10 @@ static void ddp_cmdq_cb(struct mbox_client *cl, void *mssg) > mtk_crtc->pending_async_planes = false; > } > > +spin_unlock(&mtk_crtc->config_lock); > + > +ddp_cmdq_cb_out: > + > mtk_crtc->cmdq_vblank_cnt = 0; > wake_up(&mtk_crtc->cb_blocking_queue); > } > @@ -571,7 +587,11 @@ static void mtk_crtc_update_config(struct mtk_crtc *mtk_crtc, bool needs_vblank) > int i; > > mutex_lock(&mtk_crtc->hw_lock); > + > +spin_lock(&mtk_crtc->config_lock); > mtk_crtc->config_updating = true; > +spin_unlock(&mtk_crtc->config_lock); > + > if (needs_vblank) > mtk_crtc->pending_needs_vblank = true; > > @@ -625,7 +645,10 @@ static void mtk_crtc_update_config(struct mtk_crtc *mtk_crtc, bool needs_vblank) > mbox_client_txdone(mtk_crtc->cmdq_client.chan, 0); > } > #endif > +spin_lock(&mtk_crtc->config_lock); > mtk_crtc->config_updating = false; > +spin_unlock(&mtk_crtc->config_lock); > + > mutex_unlock(&mtk_crtc->hw_lock); > } > > @@ -1068,6 +1091,7 @@ int mtk_crtc_create(struct drm_device *drm_dev, const unsigned int *path, > drm_mode_crtc_set_gamma_size(&mtk_crtc->base, gamma_lut_size); > drm_crtc_enable_color_mgmt(&mtk_crtc->base, 0, has_ctm, gamma_lut_size); > mutex_init(&mtk_crtc->hw_lock); > +spin_lock_init(&mtk_crtc->config_lock); > > #if IS_REACHABLE(CONFIG_MTK_CMDQ) > i = priv->mbox_index++; > > --- > base-commit: 469f1bad3c1c6e268059f78c0eec7e9552b3894c > change-id: 20240819-drm-fixup-0819-f51e2d37fcd7 > > Best regards, > -- > Jason-JH.Lin <jason-jh.lin@mediatek.com> > >
Hi, Jason: Jason-JH.Lin via B4 Relay <devnull+jason-jh.lin.mediatek.com@kernel.org> 於 2024年8月19日 週一 下午11:26寫道: > > From: "Jason-JH.Lin" <jason-jh.lin@mediatek.com> > > In mtk_crtc_ddp_config(), mtk_crtc will use some configuration flags to > generate instructions to cmdq_handle, such as: > state->pending_config > mtk_crtc->pending_planes > plane_state->pending.config > mtk_crtc->pending_async_planes > plane_state->pending.async_config > > These configuration flags may be set to false when a GCE IRQ comes calling > ddp_cmdq_cb(). This may result in missing prepare instructions, > especially if mtk_crtc_update_config() with the flase need_vblank (no need > to wait for vblank) cases. > > Therefore, the mtk_crtc->config_updating flag is set at the beginning of > mtk_crtc_update_config() to ensure that these configuration flags won't be > changed when the mtk_crtc_ddp_config() is preparing instructions. > But somehow the ddp_cmdq_cb() didn't use the mtk_crtc->config_updating > flag to prevent those pending config flags from being cleared. > > To avoid missing the configuration when generating the config instruction, > the config_updating flag should be added into ddp_cmdq_cb() and be > protected with spin_lock. Applied to mediatek-drm-next [1], thanks. [1] https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next Regards, Chun-Kuang. > > Fixes: 7f82d9c43879 ("drm/mediatek: Clear pending flag when cmdq packet is done") > Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com> > --- > Change in v2: > Add spin_lock protection for config_updating flag. > --- > drivers/gpu/drm/mediatek/mtk_crtc.c | 24 ++++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_crtc.c b/drivers/gpu/drm/mediatek/mtk_crtc.c > index 6f34f573e127..b752c0b46383 100644 > --- a/drivers/gpu/drm/mediatek/mtk_crtc.c > +++ b/drivers/gpu/drm/mediatek/mtk_crtc.c > @@ -69,6 +69,8 @@ struct mtk_crtc { > /* lock for display hardware access */ > struct mutex hw_lock; > bool config_updating; > + /* lock for config_updating to cmd buffer */ > + spinlock_t config_lock; > }; > > struct mtk_crtc_state { > @@ -107,10 +109,13 @@ static void mtk_crtc_finish_page_flip(struct mtk_crtc *mtk_crtc) > static void mtk_drm_finish_page_flip(struct mtk_crtc *mtk_crtc) > { > drm_crtc_handle_vblank(&mtk_crtc->base); > + > + spin_lock(&mtk_crtc->config_lock); > if (!mtk_crtc->config_updating && mtk_crtc->pending_needs_vblank) { > mtk_crtc_finish_page_flip(mtk_crtc); > mtk_crtc->pending_needs_vblank = false; > } > + spin_unlock(&mtk_crtc->config_lock); > } > > #if IS_REACHABLE(CONFIG_MTK_CMDQ) > @@ -314,6 +319,13 @@ static void ddp_cmdq_cb(struct mbox_client *cl, void *mssg) > > state = to_mtk_crtc_state(mtk_crtc->base.state); > > + spin_lock(&mtk_crtc->config_lock); > + > + if (mtk_crtc->config_updating) { > + spin_unlock(&mtk_crtc->config_lock); > + goto ddp_cmdq_cb_out; > + } > + > state->pending_config = false; > > if (mtk_crtc->pending_planes) { > @@ -340,6 +352,10 @@ static void ddp_cmdq_cb(struct mbox_client *cl, void *mssg) > mtk_crtc->pending_async_planes = false; > } > > + spin_unlock(&mtk_crtc->config_lock); > + > +ddp_cmdq_cb_out: > + > mtk_crtc->cmdq_vblank_cnt = 0; > wake_up(&mtk_crtc->cb_blocking_queue); > } > @@ -571,7 +587,11 @@ static void mtk_crtc_update_config(struct mtk_crtc *mtk_crtc, bool needs_vblank) > int i; > > mutex_lock(&mtk_crtc->hw_lock); > + > + spin_lock(&mtk_crtc->config_lock); > mtk_crtc->config_updating = true; > + spin_unlock(&mtk_crtc->config_lock); > + > if (needs_vblank) > mtk_crtc->pending_needs_vblank = true; > > @@ -625,7 +645,10 @@ static void mtk_crtc_update_config(struct mtk_crtc *mtk_crtc, bool needs_vblank) > mbox_client_txdone(mtk_crtc->cmdq_client.chan, 0); > } > #endif > + spin_lock(&mtk_crtc->config_lock); > mtk_crtc->config_updating = false; > + spin_unlock(&mtk_crtc->config_lock); > + > mutex_unlock(&mtk_crtc->hw_lock); > } > > @@ -1068,6 +1091,7 @@ int mtk_crtc_create(struct drm_device *drm_dev, const unsigned int *path, > drm_mode_crtc_set_gamma_size(&mtk_crtc->base, gamma_lut_size); > drm_crtc_enable_color_mgmt(&mtk_crtc->base, 0, has_ctm, gamma_lut_size); > mutex_init(&mtk_crtc->hw_lock); > + spin_lock_init(&mtk_crtc->config_lock); > > #if IS_REACHABLE(CONFIG_MTK_CMDQ) > i = priv->mbox_index++; > > --- > base-commit: 469f1bad3c1c6e268059f78c0eec7e9552b3894c > change-id: 20240819-drm-fixup-0819-f51e2d37fcd7 > > Best regards, > -- > Jason-JH.Lin <jason-jh.lin@mediatek.com> > >
diff --git a/drivers/gpu/drm/mediatek/mtk_crtc.c b/drivers/gpu/drm/mediatek/mtk_crtc.c index 6f34f573e127..b752c0b46383 100644 --- a/drivers/gpu/drm/mediatek/mtk_crtc.c +++ b/drivers/gpu/drm/mediatek/mtk_crtc.c @@ -69,6 +69,8 @@ struct mtk_crtc { /* lock for display hardware access */ struct mutex hw_lock; bool config_updating; + /* lock for config_updating to cmd buffer */ + spinlock_t config_lock; }; struct mtk_crtc_state { @@ -107,10 +109,13 @@ static void mtk_crtc_finish_page_flip(struct mtk_crtc *mtk_crtc) static void mtk_drm_finish_page_flip(struct mtk_crtc *mtk_crtc) { drm_crtc_handle_vblank(&mtk_crtc->base); + + spin_lock(&mtk_crtc->config_lock); if (!mtk_crtc->config_updating && mtk_crtc->pending_needs_vblank) { mtk_crtc_finish_page_flip(mtk_crtc); mtk_crtc->pending_needs_vblank = false; } + spin_unlock(&mtk_crtc->config_lock); } #if IS_REACHABLE(CONFIG_MTK_CMDQ) @@ -314,6 +319,13 @@ static void ddp_cmdq_cb(struct mbox_client *cl, void *mssg) state = to_mtk_crtc_state(mtk_crtc->base.state); + spin_lock(&mtk_crtc->config_lock); + + if (mtk_crtc->config_updating) { + spin_unlock(&mtk_crtc->config_lock); + goto ddp_cmdq_cb_out; + } + state->pending_config = false; if (mtk_crtc->pending_planes) { @@ -340,6 +352,10 @@ static void ddp_cmdq_cb(struct mbox_client *cl, void *mssg) mtk_crtc->pending_async_planes = false; } + spin_unlock(&mtk_crtc->config_lock); + +ddp_cmdq_cb_out: + mtk_crtc->cmdq_vblank_cnt = 0; wake_up(&mtk_crtc->cb_blocking_queue); } @@ -571,7 +587,11 @@ static void mtk_crtc_update_config(struct mtk_crtc *mtk_crtc, bool needs_vblank) int i; mutex_lock(&mtk_crtc->hw_lock); + + spin_lock(&mtk_crtc->config_lock); mtk_crtc->config_updating = true; + spin_unlock(&mtk_crtc->config_lock); + if (needs_vblank) mtk_crtc->pending_needs_vblank = true; @@ -625,7 +645,10 @@ static void mtk_crtc_update_config(struct mtk_crtc *mtk_crtc, bool needs_vblank) mbox_client_txdone(mtk_crtc->cmdq_client.chan, 0); } #endif + spin_lock(&mtk_crtc->config_lock); mtk_crtc->config_updating = false; + spin_unlock(&mtk_crtc->config_lock); + mutex_unlock(&mtk_crtc->hw_lock); } @@ -1068,6 +1091,7 @@ int mtk_crtc_create(struct drm_device *drm_dev, const unsigned int *path, drm_mode_crtc_set_gamma_size(&mtk_crtc->base, gamma_lut_size); drm_crtc_enable_color_mgmt(&mtk_crtc->base, 0, has_ctm, gamma_lut_size); mutex_init(&mtk_crtc->hw_lock); + spin_lock_init(&mtk_crtc->config_lock); #if IS_REACHABLE(CONFIG_MTK_CMDQ) i = priv->mbox_index++;