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X-OriginatorOrg: nokia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Jan 2021 20:36:32.1151 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 798d0dd8-d0af-43cd-0014-08d8c3033b6b X-MS-Exchange-CrossTenant-Id: 5d471751-9675-428d-917b-70f44f9630b0 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=5d471751-9675-428d-917b-70f44f9630b0;Ip=[131.228.2.8];Helo=[fihe3nok0734.emea.nsn-net.net] X-MS-Exchange-CrossTenant-AuthSource: DB5EUR03FT024.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR07MB5039 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org From: Alexander Sverdlin The switch to qspinlock brought a massive regression in spinlocks on Octeon. Even after applying this series (and a patch in the ARCH-independent code [1]) tight contended (6 cores, 1 thread per core) spinlock loop is still 50% slower as previous ticket-based implementation. This series implements some optimizations and has been tested on a 6-core Octeon machine. [1] Link: https://lkml.org/lkml/2021/1/27/1137 Alexander Sverdlin (6): MIPS: Octeon: Implement __smp_store_release() MIPS: Implement atomic_cmpxchg_relaxed() MIPS: Octeon: qspinlock: Flush write buffer MIPS: Octeon: qspinlock: Exclude mmiowb() MIPS: Provide {atomic_}xchg_relaxed() MIPS: cmpxchg: Use cmpxchg_local() for {cmp_}xchg_small() arch/mips/include/asm/atomic.h | 5 +++++ arch/mips/include/asm/barrier.h | 9 +++++++++ arch/mips/include/asm/cmpxchg.h | 6 ++++++ arch/mips/include/asm/spinlock.h | 5 +++++ arch/mips/kernel/cmpxchg.c | 4 ++-- 5 files changed, 27 insertions(+), 2 deletions(-)