From patchwork Sat Nov 27 01:18:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 12641803 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 21E92C4332F for ; Sat, 27 Nov 2021 01:20:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344445AbhK0BXv (ORCPT ); Fri, 26 Nov 2021 20:23:51 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36016 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243404AbhK0BVu (ORCPT ); Fri, 26 Nov 2021 20:21:50 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EDA48C061574; Fri, 26 Nov 2021 17:18:36 -0800 (PST) Message-ID: <20211126222700.862407977@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1637975915; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=yycwdrBPyffnUpJMIEsWOSM4kLQ6cxBvXzwUm35xG8E=; b=DCccYnZ0yiKVC0u4+n9H7FGmyRWRAGxhw5lrXeLif2IGAZr2rY9i+43Gc7Jsnud/oidZaZ LrE05UjXTCVSyDbmgOY0HxqDRbgAp4/y2qAPiBbi9Kif3xh1IRuv+y3cBqvYsowoPm/WUk on0YrcUZq1Cix85vFTL/gxX7VMgOIB65lC5o4RFDq43U76Ck4A4DQQ8l0aK00NPb8MNzf1 +R+QnmSKpPY5SIbzSJT2d2nsAUVEpzoB+W6mglKPZfD5NcRonwy3W9aAXRIOuuFkxKApoo q69j8LzAaUKTG+q9KEnL6HEfmmniRk/WIf4JJGwI6N1sJcqzmoeXfX/O3IGlFA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1637975915; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=yycwdrBPyffnUpJMIEsWOSM4kLQ6cxBvXzwUm35xG8E=; b=l69jhsGH0nQzlU5HDD675NHbpXuRhbgyrkanFSndKRF1Uq0JyAqp7+zU1xeEBSXpgtUx6d EqGASFw1EGmh4PDQ== From: Thomas Gleixner To: LKML Cc: Bjorn Helgaas , Marc Zygnier , Alex Williamson , Kevin Tian , Jason Gunthorpe , Megha Dey , Ashok Raj , linux-pci@vger.kernel.org, Michael Ellerman , Paul Mackerras , Benjamin Herrenschmidt , linuxppc-dev@lists.ozlabs.org, Thomas Bogendoerfer , linux-mips@vger.kernel.org, Greg Kroah-Hartman , sparclinux@vger.kernel.org, x86@kernel.org, xen-devel@lists.xenproject.org, ath11k@lists.infradead.org, Wei Liu , linux-hyperv@vger.kernel.org, Juergen Gross , Christian Borntraeger , Heiko Carstens Subject: [patch 00/22] genirq/msi, PCI/MSI: Spring cleaning - Part 1 MIME-Version: 1.0 Date: Sat, 27 Nov 2021 02:18:34 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org The [PCI] MSI code has gained quite some warts over time. A recent discussion unearthed a shortcoming: the lack of support for expanding PCI/MSI-X vectors after initialization of MSI-X. PCI/MSI-X has no requirement to setup all vectors when MSI-X is enabled in the device. The non-used vectors have just to be masked in the vector table. For PCI/MSI this is not possible because the number of vectors cannot be changed after initialization. The PCI/MSI code, but also the core MSI irq domain code are built around the assumption that all required vectors are installed at initialization time and freed when the device is shut down by the driver. Supporting dynamic expansion at least for MSI-X is important for VFIO so that the host side interrupts for passthrough devices can be installed on demand. This is the first part of a large (total 101 patches) series which refactors the [PCI]MSI infrastructure to make runtime expansion of MSI-X vectors possible. The last part (10 patches) provide this functionality. The first part is mostly a cleanup which consolidates code, moves the PCI MSI code into a separate directory and splits it up into several parts. No functional change intended except for patch 2/N which changes the behaviour of pci_get_vector()/affinity() to get rid of the assumption that the provided index is the "index" into the descriptor list instead of using it as the actual MSI[X] index as seen by the hardware. This would break users of sparse allocated MSI-X entries, but non of them use these functions. This series is based on 5.16-rc2 and also available via git: git://git.kernel.org/pub/scm/linux/kernel/git/tglx/devel.git msi-v1-part-1 For the curious who can't wait for the next part to arrive the full series is available via: git://git.kernel.org/pub/scm/linux/kernel/git/tglx/devel.git msi-v1-part-4 Thanks, tglx Reviewed-by: Jason Gunthorpe Tested-by: Juergen Gross --- arch/powerpc/platforms/4xx/msi.c | 281 ------------ b/Documentation/driver-api/pci/pci.rst | 2 b/arch/mips/pci/msi-octeon.c | 32 - b/arch/powerpc/platforms/4xx/Makefile | 1 b/arch/powerpc/platforms/cell/axon_msi.c | 2 b/arch/powerpc/platforms/powernv/pci-ioda.c | 4 b/arch/powerpc/platforms/pseries/msi.c | 6 b/arch/powerpc/sysdev/Kconfig | 6 b/arch/s390/pci/pci_irq.c | 4 b/arch/sparc/kernel/pci_msi.c | 4 b/arch/x86/hyperv/irqdomain.c | 55 -- b/arch/x86/include/asm/x86_init.h | 6 b/arch/x86/include/asm/xen/hypervisor.h | 8 b/arch/x86/kernel/apic/msi.c | 8 b/arch/x86/kernel/x86_init.c | 12 b/arch/x86/pci/xen.c | 19 b/drivers/irqchip/irq-gic-v2m.c | 1 b/drivers/irqchip/irq-gic-v3-its-pci-msi.c | 1 b/drivers/irqchip/irq-gic-v3-mbi.c | 1 b/drivers/net/wireless/ath/ath11k/pci.c | 2 b/drivers/pci/Makefile | 3 b/drivers/pci/msi/Makefile | 7 b/drivers/pci/msi/irqdomain.c | 267 +++++++++++ b/drivers/pci/msi/legacy.c | 79 +++ b/drivers/pci/msi/msi.c | 645 ++++------------------------ b/drivers/pci/msi/msi.h | 39 + b/drivers/pci/msi/pcidev_msi.c | 43 + b/drivers/pci/pci-sysfs.c | 7 b/drivers/pci/xen-pcifront.c | 2 b/include/linux/msi.h | 135 ++--- b/include/linux/pci.h | 1 b/kernel/irq/msi.c | 41 + 32 files changed, 696 insertions(+), 1028 deletions(-)