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[v3,0/1] clk: jz4725b: fix mmc0 clock gating

Message ID 20220205094531.676371-1-lis8215@gmail.com (mailing list archive)
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Series clk: jz4725b: fix mmc0 clock gating | expand

Message

Siarhei Volkau Feb. 5, 2022, 9:45 a.m. UTC
The mmc0 clock gate bit was mistakenly assigned to "i2s" clock.
You can find that the same bit is assigned to "mmc0" too.
It leads to mmc0 hang for a long time after any sound activity
also it  prevented PM_SLEEP to work properly.
I guess it was introduced by copy-paste from jz4740 driver
where it is really controls I2S clock gate.

Changelog v2 .. v3:
 - Added tags Fixes and Reviewed-by.
Changelog v1 .. v2:
 - Added useful info above to the commit itself.

Siarhei Volkau (1):
  clk: jz4725b: fix mmc0 clock gating

 drivers/clk/ingenic/jz4725b-cgu.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)