[00/12] MIPS: Support I6500 multi-cluster configuration

Message

Dragan Mladjenovic May 19, 2022, 6:51 p.m. UTC

Taken from Paul Burton MIPS repo with minor changes. Tested with
64r6el_defconfig on Boston board in 2 cluster/2 VPU and 1 cluster/4 VPU
configurations.

Chao-ying Fu (1):
  irqchip: mips-gic: Setup defaults in each cluster

Paul Burton (11):
  MIPS: CPS: Add a couple of multi-cluster utility functions
  MIPS: GIC: Generate redirect block accessors
  irqchip: mips-gic: Introduce gic_with_each_online_cpu()
  irqchip: mips-gic: Support multi-cluster in gic_with_each_online_cpu()
  irqchip: mips-gic: Multi-cluster support
  clocksource: mips-gic-timer: Always use cluster 0 counter as clocksource
  clocksource: mips-gic-timer: Enable counter when CPUs start
  MIPS: pm-cps: Use per-CPU variables as per-CPU, not per-core
  MIPS: CPS: Introduce struct cluster_boot_config
  MIPS: Report cluster in /proc/cpuinfo
  MIPS: CPS: Boot CPUs in secondary clusters

 arch/mips/include/asm/mips-cm.h      |  18 ++
 arch/mips/include/asm/mips-cps.h     |  38 ++++
 arch/mips/include/asm/mips-gic.h     |  50 +++--
 arch/mips/include/asm/smp-cps.h      |   7 +-
 arch/mips/kernel/asm-offsets.c       |   3 +
 arch/mips/kernel/cps-vec.S           |  19 +-
 arch/mips/kernel/mips-cm.c           |  41 +++-
 arch/mips/kernel/pm-cps.c            |  35 ++--
 arch/mips/kernel/proc.c              |   3 +
 arch/mips/kernel/smp-cps.c           | 297 ++++++++++++++++++++++-----
 drivers/clocksource/mips-gic-timer.c |  45 +++-
 drivers/irqchip/Kconfig              |   1 +
 drivers/irqchip/irq-mips-gic.c       | 263 +++++++++++++++++++++---
 13 files changed, 692 insertions(+), 128 deletions(-)