Message ID | 20230227184614.70026-1-jiaxun.yang@flygoat.com (mailing list archive) |
---|---|
Headers | show |
Series | MIPS Booting fixes | expand |
On Mon, Feb 27, 2023 at 06:46:12PM +0000, Jiaxun Yang wrote: > Hi all, > > This patchset fixes two issues that was found when doing reboot > stress test on Malta/Boston FPGA board with various MIPS cores. > > Perhaps they should go through the mips-fixes tree. > > Thanks > > Jiaxun Yang (2): > MIPS: smp-cps: Don't rely on CP0_CMGCRBASE > MIPS: cevt-r4k: Offset the value used to clear compare interrupt > > arch/mips/include/asm/smp-cps.h | 4 ++++ > arch/mips/kernel/cevt-r4k.c | 4 ++-- > arch/mips/kernel/cps-vec.S | 35 ++++++++++++++------------------- > arch/mips/kernel/smp-cps.c | 2 ++ > 4 files changed, 23 insertions(+), 22 deletions(-) > > -- > 2.37.1 (Apple Git-137.1) applied to mips-next (will send in a second PR for this merge window). Thomas.