[v3,0/3] irqchip/loongson-eiointc: Refine irq affinity setting during resume

Message

bibo mao Jan. 18, 2024, 12:15 p.m. UTC

During suspend and resume, other CPUs are hot-unpluged and IRQs are
migrated to CPU0. So it is not necessary to restore irq affinity for
eiointc irq controller.

Also there is some optimization for the interrupt dispatch function
eiointc_irq_dispatch. There are 256 IRQs supported for eiointc, eiointc
irq handler reads the bitmap and find pending irqs when irq happens.
So there are four times of consecutive iocsr_read64 operations for the
total 256 bits to find all pending irqs. If the pending bitmap is zero,
it means that there is no pending irq for the this irq bitmap range,
we can skip handling to avoid some useless operations such as clearing
hw ISR.

---
 Changes in v3:
   Split the patch into three small patches

 Changes in v2:
   Modify changelog and comments
---
Bibo Mao (3):
  irqchip/loongson-eiointc: Skip handling if there is no pending irq
  irqchip/loongson-eiointc: Refine irq affinity setting during resume
  irqchip/loongson-eiointc: Typo fix in function eiointc_domain_alloc

 drivers/irqchip/irq-loongson-eiointc.c | 29 +++++++++++---------------
 1 file changed, 12 insertions(+), 17 deletions(-)


base-commit: 052d534373b7ed33712a63d5e17b2b6cdbce84fd