[v4,0/3] irqchip/loongson-eiointc: Refine irq affinity setting during resume

Message

bibo mao Jan. 25, 2024, 11:36 a.m. UTC

During suspend and resume, other CPUs are hot-unpluged and IRQs are
migrated to CPU0. So it is not necessary to restore irq affinity for
eiointc irq controller.

Also there is small optimization for the interrupt dispatch function
eiointc_irq_dispatch. For example there are 256 IRQs supported for
eiointc on Loongson 3A5000 and 2K2000 system, 128 IRQs on 2K0500 platform,
eiointc irq handler reads the bitmap and find pending irqs when irq
happens. So there are four times of consecutive iocsr_read64 operations
for all the bits to find all pending irqs. If the pending bitmap is zero,
it means that there is no pending irq for the this irq bitmap range, we
can skip handling to avoid some useless operations such as clearing hw ISR.

---
 Changes in v4:
  1. Adjust order of the patch and put the simple patch as first one.
  2. Modify comments in function eiointc_irq_dispatch suitable for all
hw platforms.
   
 Changes in v3:
   Split the patch into three small patches

 Changes in v2:
   Modify changelog and comments
---
Bibo Mao (3):
  irqchip/loongson-eiointc: Typo fix in function eiointc_domain_alloc
  irqchip/loongson-eiointc: Skip handling if there is no pending irq
  irqchip/loongson-eiointc: Refine irq affinity setting during resume

 drivers/irqchip/irq-loongson-eiointc.c | 24 +++++++-----------------
 1 file changed, 7 insertions(+), 17 deletions(-)


base-commit: 615d300648869c774bd1fe54b4627bb0c20faed4