Message ID | 20240612-mips-clks-v2-0-a57e6f49f3db@flygoat.com (mailing list archive) |
---|---|
Headers | show |
Series | MIPS: clocksource cumulative enhancements | expand |
在2024年6月12日六月 下午4:54,Jiaxun Yang写道: > Hi all, > > This series combined many enhancements for MIPS clocksource subsystems, > It improved r4k count synchronisation process, clock source rating for > selection, sched_clock eligibility and so on. > > It seems fixed random RCU stall issue on Loongson 3A4000 multi-node > system and some boot failures on QEMU. Ping :-) > > Please review. > > Thanks > > Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> > --- > Changes in v2: > - Fix number of zeros in rating computation (Maciej) > - Only select HAVE_UNSTABLE_SCHED_CLOCK for SMP (Maciej) > - Link to v1: > https://lore.kernel.org/r/20240511-mips-clks-v1-0-ddb4a10ee9f9@flygoat.com > > --- > Jiaxun Yang (7): > MIPS: csrc-r4k: Refine rating computation > MIPS: csrc-r4k: Apply verification clocksource flags > MIPS: csrc-r4k: Select HAVE_UNSTABLE_SCHED_CLOCK if SMP && 64BIT > MIPS: csrc-r4k: Don't register as sched_clock if unfit > MIPS: sync-r4k: Rework based on x86 tsc_sync > clocksource: mips-gic-timer: Refine rating computation > clocksource: mips-gic-timer: Correct sched_clock width > > arch/mips/Kconfig | 1 + > arch/mips/include/asm/r4k-timer.h | 5 - > arch/mips/kernel/csrc-r4k.c | 24 ++- > arch/mips/kernel/smp.c | 2 - > arch/mips/kernel/sync-r4k.c | 281 +++++++++++++++++++++++++---------- > drivers/clocksource/mips-gic-timer.c | 20 ++- > 6 files changed, 234 insertions(+), 99 deletions(-) > --- > base-commit: 704ba27ac55579704ba1289392448b0c66b56258 > change-id: 20240509-mips-clks-9001264fcfbe > > Best regards, > -- > Jiaxun Yang <jiaxun.yang@flygoat.com>
On Wed, Jun 12, 2024 at 09:54:27AM +0100, Jiaxun Yang wrote: > Hi all, > > This series combined many enhancements for MIPS clocksource subsystems, > It improved r4k count synchronisation process, clock source rating for > selection, sched_clock eligibility and so on. > > It seems fixed random RCU stall issue on Loongson 3A4000 multi-node > system and some boot failures on QEMU. > > Please review. > > Thanks > > Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> > --- > Changes in v2: > - Fix number of zeros in rating computation (Maciej) > - Only select HAVE_UNSTABLE_SCHED_CLOCK for SMP (Maciej) > - Link to v1: https://lore.kernel.org/r/20240511-mips-clks-v1-0-ddb4a10ee9f9@flygoat.com > > --- > Jiaxun Yang (7): > MIPS: csrc-r4k: Refine rating computation > MIPS: csrc-r4k: Apply verification clocksource flags > MIPS: csrc-r4k: Select HAVE_UNSTABLE_SCHED_CLOCK if SMP && 64BIT > MIPS: csrc-r4k: Don't register as sched_clock if unfit > MIPS: sync-r4k: Rework based on x86 tsc_sync applied these patches to mips-next. > clocksource: mips-gic-timer: Refine rating computation > clocksource: mips-gic-timer: Correct sched_clock width looks like the remaining patches don't have any dependency to the other five patches, so they could just go via clocksource tree. BTW it would be good to split series in such cases. Thomas.
On 03/07/2024 17:24, Thomas Bogendoerfer wrote: > On Wed, Jun 12, 2024 at 09:54:27AM +0100, Jiaxun Yang wrote: >> Hi all, >> >> This series combined many enhancements for MIPS clocksource subsystems, >> It improved r4k count synchronisation process, clock source rating for >> selection, sched_clock eligibility and so on. >> >> It seems fixed random RCU stall issue on Loongson 3A4000 multi-node >> system and some boot failures on QEMU. >> >> Please review. >> >> Thanks >> >> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> >> --- >> Changes in v2: >> - Fix number of zeros in rating computation (Maciej) >> - Only select HAVE_UNSTABLE_SCHED_CLOCK for SMP (Maciej) >> - Link to v1: https://lore.kernel.org/r/20240511-mips-clks-v1-0-ddb4a10ee9f9@flygoat.com >> >> --- >> Jiaxun Yang (7): >> MIPS: csrc-r4k: Refine rating computation >> MIPS: csrc-r4k: Apply verification clocksource flags >> MIPS: csrc-r4k: Select HAVE_UNSTABLE_SCHED_CLOCK if SMP && 64BIT >> MIPS: csrc-r4k: Don't register as sched_clock if unfit >> MIPS: sync-r4k: Rework based on x86 tsc_sync > > applied these patches to mips-next. > >> clocksource: mips-gic-timer: Refine rating computation >> clocksource: mips-gic-timer: Correct sched_clock width > > looks like the remaining patches don't have any dependency to the other > five patches, so they could just go via clocksource tree. BTW it would > be good to split series in such cases. Applied patches 6 and 7 Thanks -- Daniel
Hi all, This series combined many enhancements for MIPS clocksource subsystems, It improved r4k count synchronisation process, clock source rating for selection, sched_clock eligibility and so on. It seems fixed random RCU stall issue on Loongson 3A4000 multi-node system and some boot failures on QEMU. Please review. Thanks Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> --- Changes in v2: - Fix number of zeros in rating computation (Maciej) - Only select HAVE_UNSTABLE_SCHED_CLOCK for SMP (Maciej) - Link to v1: https://lore.kernel.org/r/20240511-mips-clks-v1-0-ddb4a10ee9f9@flygoat.com --- Jiaxun Yang (7): MIPS: csrc-r4k: Refine rating computation MIPS: csrc-r4k: Apply verification clocksource flags MIPS: csrc-r4k: Select HAVE_UNSTABLE_SCHED_CLOCK if SMP && 64BIT MIPS: csrc-r4k: Don't register as sched_clock if unfit MIPS: sync-r4k: Rework based on x86 tsc_sync clocksource: mips-gic-timer: Refine rating computation clocksource: mips-gic-timer: Correct sched_clock width arch/mips/Kconfig | 1 + arch/mips/include/asm/r4k-timer.h | 5 - arch/mips/kernel/csrc-r4k.c | 24 ++- arch/mips/kernel/smp.c | 2 - arch/mips/kernel/sync-r4k.c | 281 +++++++++++++++++++++++++---------- drivers/clocksource/mips-gic-timer.c | 20 ++- 6 files changed, 234 insertions(+), 99 deletions(-) --- base-commit: 704ba27ac55579704ba1289392448b0c66b56258 change-id: 20240509-mips-clks-9001264fcfbe Best regards,