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Wed, 12 Jun 2024 04:54:31 -0400 (EDT) From: Jiaxun Yang Subject: [PATCH v2 0/7] MIPS: clocksource cumulative enhancements Date: Wed, 12 Jun 2024 09:54:27 +0100 Message-Id: <20240612-mips-clks-v2-0-a57e6f49f3db@flygoat.com> Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAENiaWYC/03MQQqDMBCF4avIrJsyCWkhXfUexYUmEx2qRhIJi nj3ptJFl//j8e2QKDIleFQ7RMqcOEwl1KUC2zdTR4JdaVCoNN7QiJHnJOzwTsIgSnXX3vqWoPz nSJ7X03rVpXtOS4jbSWf5XX+KlH9KlgKFc61uJBIZb55+2LrQLFcbRqiP4/gALnSyk6QAAAA= To: Thomas Bogendoerfer , Serge Semin , Daniel Lezcano , Thomas Gleixner Cc: "Maciej W. Rozycki" , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, Jiaxun Yang , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1607; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=CbzxrYeWgw0AJwKo1baxmPySDo25rlvVno/AJ+pxyo0=; b=owGbwMvMwCXmXMhTe71c8zDjabUkhrTMJPebe4N/+p5ki77pGPXNKXTnhSkfMxr3rbfi/l/hb VuVuftvRykLgxgXg6yYIkuIgFLfhsaLC64/yPoDM4eVCWQIAxenAEzksSbD/+qWB/8WZU99as8q 3LJZ547cqiBW3d01zilnhGVvbxH7M4Hhn9oFT+a1Rw8m6YW0rTjHcyC7R7NKccWjhds9vFjPp8h cZQMA X-Developer-Key: i=jiaxun.yang@flygoat.com; a=openpgp; fpr=980379BEFEBFBF477EA04EF9C111949073FC0F67 Hi all, This series combined many enhancements for MIPS clocksource subsystems, It improved r4k count synchronisation process, clock source rating for selection, sched_clock eligibility and so on. It seems fixed random RCU stall issue on Loongson 3A4000 multi-node system and some boot failures on QEMU. Please review. Thanks Signed-off-by: Jiaxun Yang --- Changes in v2: - Fix number of zeros in rating computation (Maciej) - Only select HAVE_UNSTABLE_SCHED_CLOCK for SMP (Maciej) - Link to v1: https://lore.kernel.org/r/20240511-mips-clks-v1-0-ddb4a10ee9f9@flygoat.com --- Jiaxun Yang (7): MIPS: csrc-r4k: Refine rating computation MIPS: csrc-r4k: Apply verification clocksource flags MIPS: csrc-r4k: Select HAVE_UNSTABLE_SCHED_CLOCK if SMP && 64BIT MIPS: csrc-r4k: Don't register as sched_clock if unfit MIPS: sync-r4k: Rework based on x86 tsc_sync clocksource: mips-gic-timer: Refine rating computation clocksource: mips-gic-timer: Correct sched_clock width arch/mips/Kconfig | 1 + arch/mips/include/asm/r4k-timer.h | 5 - arch/mips/kernel/csrc-r4k.c | 24 ++- arch/mips/kernel/smp.c | 2 - arch/mips/kernel/sync-r4k.c | 281 +++++++++++++++++++++++++---------- drivers/clocksource/mips-gic-timer.c | 20 ++- 6 files changed, 234 insertions(+), 99 deletions(-) --- base-commit: 704ba27ac55579704ba1289392448b0c66b56258 change-id: 20240509-mips-clks-9001264fcfbe Best regards,