Message ID | 1564335273-22931-4-git-send-email-zhouyanjie@zoho.com (mailing list archive) |
---|---|
State | Not Applicable |
Headers | show |
Series | [1/4,v4] irqchip: Ingenic: Change interrupt handling form cascade to chained_irq. | expand |
diff --git a/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.txt b/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.txt index d4373d0..a96e120 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.txt @@ -5,9 +5,14 @@ Required properties: - compatible : should be "ingenic,<socname>-intc". Valid strings are: ingenic,jz4740-intc ingenic,jz4725b-intc + ingenic,jz4760-intc + ingenic,jz4760b-intc ingenic,jz4770-intc ingenic,jz4775-intc ingenic,jz4780-intc + ingenic,x1000-intc + ingenic,x1000e-intc + ingenic,x1500-intc - reg : Specifies base physical address and size of the registers. - interrupt-controller : Identifies the node as an interrupt controller - #interrupt-cells : Specifies the number of cells needed to encode an
Add the interrupt-controller bindings for the JZ4760/JZ4760B and the X1000/X1000E and the X1500 Socs from Ingenic. Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com> --- .../devicetree/bindings/interrupt-controller/ingenic,intc.txt | 5 +++++ 1 file changed, 5 insertions(+)