Message ID | 1587893445-9656-1-git-send-email-yangtiezhu@loongson.cn (mailing list archive) |
---|---|
State | Mainlined |
Commit | e2e13925ff74afa011e8c667cd9ceda38f254fc5 |
Headers | show |
Series | MIPS: Loongson: Add support for perf tool | expand |
On Sun, Apr 26, 2020 at 05:30:45PM +0800, Tiezhu Yang wrote: > In order to use perf tool on the Loongson platform, we should enable kernel > support for various performance events provided by software and hardware, > so add CONFIG_PERF_EVENTS=y to loongson3_defconfig. > > E.g. without this patch: > > [loongson@localhost perf]$ ./perf list > > List of pre-defined events (to be used in -e): > > duration_time [Tool event] > > rNNN [Raw hardware event descriptor] > cpu/t1=v1[,t2=v2,t3 ...]/modifier [Raw hardware event descriptor] > (see 'man perf-list' on how to encode it) > > mem:<addr>[/len][:access] [Hardware breakpoint] > > With this patch: > > [loongson@localhost perf]$ ./perf list > > List of pre-defined events (to be used in -e): > > branch-instructions OR branches [Hardware event] > branch-misses [Hardware event] > cpu-cycles OR cycles [Hardware event] > instructions [Hardware event] > > alignment-faults [Software event] > bpf-output [Software event] > context-switches OR cs [Software event] > cpu-clock [Software event] > cpu-migrations OR migrations [Software event] > dummy [Software event] > emulation-faults [Software event] > major-faults [Software event] > minor-faults [Software event] > page-faults OR faults [Software event] > task-clock [Software event] > > duration_time [Tool event] > > L1-dcache-load-misses [Hardware cache event] > L1-dcache-store-misses [Hardware cache event] > L1-icache-load-misses [Hardware cache event] > branch-load-misses [Hardware cache event] > branch-loads [Hardware cache event] > dTLB-load-misses [Hardware cache event] > dTLB-store-misses [Hardware cache event] > iTLB-load-misses [Hardware cache event] > > rNNN [Raw hardware event descriptor] > cpu/t1=v1[,t2=v2,t3 ...]/modifier [Raw hardware event descriptor] > (see 'man perf-list' on how to encode it) > > mem:<addr>[/len][:access] [Hardware breakpoint] > > Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> > --- > arch/mips/configs/loongson3_defconfig | 1 + > 1 file changed, 1 insertion(+) applied to mips-next. Thomas.
diff --git a/arch/mips/configs/loongson3_defconfig b/arch/mips/configs/loongson3_defconfig index 51675f5..6768c16 100644 --- a/arch/mips/configs/loongson3_defconfig +++ b/arch/mips/configs/loongson3_defconfig @@ -21,6 +21,7 @@ CONFIG_SYSFS_DEPRECATED=y CONFIG_RELAY=y CONFIG_BLK_DEV_INITRD=y CONFIG_EMBEDDED=y +CONFIG_PERF_EVENTS=y CONFIG_MACH_LOONGSON64=y CONFIG_SMP=y CONFIG_HZ_256=y
In order to use perf tool on the Loongson platform, we should enable kernel support for various performance events provided by software and hardware, so add CONFIG_PERF_EVENTS=y to loongson3_defconfig. E.g. without this patch: [loongson@localhost perf]$ ./perf list List of pre-defined events (to be used in -e): duration_time [Tool event] rNNN [Raw hardware event descriptor] cpu/t1=v1[,t2=v2,t3 ...]/modifier [Raw hardware event descriptor] (see 'man perf-list' on how to encode it) mem:<addr>[/len][:access] [Hardware breakpoint] With this patch: [loongson@localhost perf]$ ./perf list List of pre-defined events (to be used in -e): branch-instructions OR branches [Hardware event] branch-misses [Hardware event] cpu-cycles OR cycles [Hardware event] instructions [Hardware event] alignment-faults [Software event] bpf-output [Software event] context-switches OR cs [Software event] cpu-clock [Software event] cpu-migrations OR migrations [Software event] dummy [Software event] emulation-faults [Software event] major-faults [Software event] minor-faults [Software event] page-faults OR faults [Software event] task-clock [Software event] duration_time [Tool event] L1-dcache-load-misses [Hardware cache event] L1-dcache-store-misses [Hardware cache event] L1-icache-load-misses [Hardware cache event] branch-load-misses [Hardware cache event] branch-loads [Hardware cache event] dTLB-load-misses [Hardware cache event] dTLB-store-misses [Hardware cache event] iTLB-load-misses [Hardware cache event] rNNN [Raw hardware event descriptor] cpu/t1=v1[,t2=v2,t3 ...]/modifier [Raw hardware event descriptor] (see 'man perf-list' on how to encode it) mem:<addr>[/len][:access] [Hardware breakpoint] Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> --- arch/mips/configs/loongson3_defconfig | 1 + 1 file changed, 1 insertion(+)