| Message ID | 1588938904-924-3-git-send-email-yangtiezhu@loongson.cn (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | MIPS: Loongson: Fix some issues of cpu_hwmon.c | expand |
On 2020/5/8 19:55, Tiezhu Yang wrote: > Add PRID_IMP_LOONGSON_64G case to enable hwmon support for Loongson > generic CPU such as 3A4000 and newer CPU. > > Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> > --- > drivers/platform/mips/cpu_hwmon.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/platform/mips/cpu_hwmon.c b/drivers/platform/mips/cpu_hwmon.c > index add5f52..7b4bde1 100644 > --- a/drivers/platform/mips/cpu_hwmon.c > +++ b/drivers/platform/mips/cpu_hwmon.c > @@ -43,6 +43,7 @@ int loongson3_cpu_temp(int cpu) > break; > case PRID_REV_LOONGSON3A_R3_0: > case PRID_REV_LOONGSON3A_R3_1: > + case PRID_IMP_LOONGSON_64G: > default: > reg = (reg & 0xffff)*731/0x4000 - 273; > break; Hi, This is obviously wrong, as the value being matched is a PRID_REV. You can tell from the neighboring match arms. Also, the LOONGSON_64G cores are 3A4000 and newer, that have CSR support. The csr_temp_enable flag is probed in loongson_hwmon_init, then the switch is simply never entered for these.
On 05/08/2020 08:51 PM, WANG Xuerui wrote: > On 2020/5/8 19:55, Tiezhu Yang wrote: > >> Add PRID_IMP_LOONGSON_64G case to enable hwmon support for Loongson >> generic CPU such as 3A4000 and newer CPU. >> >> Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> >> --- >> drivers/platform/mips/cpu_hwmon.c | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/drivers/platform/mips/cpu_hwmon.c >> b/drivers/platform/mips/cpu_hwmon.c >> index add5f52..7b4bde1 100644 >> --- a/drivers/platform/mips/cpu_hwmon.c >> +++ b/drivers/platform/mips/cpu_hwmon.c >> @@ -43,6 +43,7 @@ int loongson3_cpu_temp(int cpu) >> break; >> case PRID_REV_LOONGSON3A_R3_0: >> case PRID_REV_LOONGSON3A_R3_1: >> + case PRID_IMP_LOONGSON_64G: >> default: >> reg = (reg & 0xffff)*731/0x4000 - 273; >> break; > > Hi, > > This is obviously wrong, as the value being matched is a PRID_REV. You > can tell from the neighboring match arms. > > Also, the LOONGSON_64G cores are 3A4000 and newer, that have CSR > support. The csr_temp_enable flag is probed in loongson_hwmon_init, > then the switch is simply never entered for these. Hi Xuerui, Thanks for your review. You are right. I notice that this feature has been done in the commit 7507445b1993 ("MIPS: Loongson: Add Loongson-3A R4 basic support"). My initial aim is to get CPU temperature for the Loongson generic CPU when the flag csr_temp_enable is false, but this is just the default case. So this patch is meaningless, please ignore it. Because patch 3/3 depends on this patch 2/3, I will remake and send v2 patch series without this patch. Thanks, Tiezhu Yang
diff --git a/drivers/platform/mips/cpu_hwmon.c b/drivers/platform/mips/cpu_hwmon.c index add5f52..7b4bde1 100644 --- a/drivers/platform/mips/cpu_hwmon.c +++ b/drivers/platform/mips/cpu_hwmon.c @@ -43,6 +43,7 @@ int loongson3_cpu_temp(int cpu) break; case PRID_REV_LOONGSON3A_R3_0: case PRID_REV_LOONGSON3A_R3_1: + case PRID_IMP_LOONGSON_64G: default: reg = (reg & 0xffff)*731/0x4000 - 273; break;
Add PRID_IMP_LOONGSON_64G case to enable hwmon support for Loongson generic CPU such as 3A4000 and newer CPU. Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> --- drivers/platform/mips/cpu_hwmon.c | 1 + 1 file changed, 1 insertion(+)