From patchwork Wed Jun 24 06:32:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tiezhu Yang X-Patchwork-Id: 11622381 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E21466C1 for ; Wed, 24 Jun 2020 06:39:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CC28520899 for ; Wed, 24 Jun 2020 06:39:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388635AbgFXGjP (ORCPT ); Wed, 24 Jun 2020 02:39:15 -0400 Received: from mail.loongson.cn ([114.242.206.163]:46458 "EHLO loongson.cn" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2388427AbgFXGjO (ORCPT ); Wed, 24 Jun 2020 02:39:14 -0400 Received: from linux.localdomain (unknown [113.200.148.30]) by mail.loongson.cn (Coremail) with SMTP id AQAAf9Dxj9+j8_Je2R5JAA--.564S7; Wed, 24 Jun 2020 14:33:11 +0800 (CST) From: Tiezhu Yang To: Thomas Gleixner , Jason Cooper , Marc Zyngier Cc: linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, Xuefeng Li Subject: [PATCH v2 05/14] irqchip/davinci-cp-intc: Fix potential resource leaks Date: Wed, 24 Jun 2020 14:32:38 +0800 Message-Id: <1592980367-1816-6-git-send-email-yangtiezhu@loongson.cn> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1592980367-1816-1-git-send-email-yangtiezhu@loongson.cn> References: <1592980367-1816-1-git-send-email-yangtiezhu@loongson.cn> X-CM-TRANSID: AQAAf9Dxj9+j8_Je2R5JAA--.564S7 X-Coremail-Antispam: 1UD129KBjvJXoW7WrWfKr17tF17GF15ur45Wrg_yoW8ur4fpF 4fJ3y3Ww48Jr1rXrs3AFyrWFnxKw1DCrW2yrW7Gas7ursYvFWqkF1YyF1DZFyUua17Ar10 ya1fJa409F15ZaUanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUU9K14x267AKxVWrJVCq3wAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2048vs2IY020E87I2jVAFwI0_JF0E3s1l82xGYI kIc2x26xkF7I0E14v26ryj6s0DM28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48ve4kI8wA2 z4x0Y4vE2Ix0cI8IcVAFwI0_Xr0_Ar1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI0_Cr0_Gr 1UM28EF7xvwVC2z280aVAFwI0_Cr1j6rxdM28EF7xvwVC2z280aVCY1x0267AKxVW0oVCq 3wAS0I0E0xvYzxvE52x082IY62kv0487Mc02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0I7 IYx2IY67AKxVWUJVWUGwAv7VC2z280aVAFwI0_Gr0_Cr1lOx8S6xCaFVCjc4AY6r1j6r4U M4x0Y48IcxkI7VAKI48JM4x0x7Aq67IIx4CEVc8vx2IErcIFxwCF04k20xvY0x0EwIxGrw CFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18MI8I3I0E7480Y4vE 14v26r106r1rMI8E67AF67kF1VAFwI0_JF0_Jw1lIxkGc2Ij64vIr41lIxAIcVC0I7IYx2 IY67AKxVWUCVW8JwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Gr0_Cr1lIxAIcVCF04k26cxK x2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26F4j6r4UJwCI42IY6I8E87Iv6xkF7I0E14 v26F4UJVW0obIYCTnIWIevJa73UjIFyTuYvjfUeXd1UUUUU X-CM-SenderInfo: p1dqw3xlh2x3gn0dqz5rrqw2lrqou0/ Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org There exists potential resource leaks in the error path, fix them. Fixes: 0fc3d74cf946 ("irqchip: davinci-cp-intc: move the driver to drivers/irqchip") Signed-off-by: Tiezhu Yang --- drivers/irqchip/irq-davinci-cp-intc.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff --git a/drivers/irqchip/irq-davinci-cp-intc.c b/drivers/irqchip/irq-davinci-cp-intc.c index 276da277..991339f 100644 --- a/drivers/irqchip/irq-davinci-cp-intc.c +++ b/drivers/irqchip/irq-davinci-cp-intc.c @@ -175,7 +175,8 @@ davinci_cp_intc_do_init(const struct davinci_cp_intc_config *config, resource_size(&config->reg)); if (!davinci_cp_intc_base) { pr_err("%s: unable to ioremap register range\n", __func__); - return -EINVAL; + ret = -EINVAL; + goto err_release; } davinci_cp_intc_write(0, DAVINCI_CP_INTC_GLOBAL_ENABLE); @@ -210,7 +211,8 @@ davinci_cp_intc_do_init(const struct davinci_cp_intc_config *config, if (irq_base < 0) { pr_err("%s: unable to allocate interrupt descriptors: %d\n", __func__, irq_base); - return irq_base; + ret = irq_base; + goto err_iounmap; } davinci_cp_intc_irq_domain = irq_domain_add_legacy( @@ -219,7 +221,8 @@ davinci_cp_intc_do_init(const struct davinci_cp_intc_config *config, if (!davinci_cp_intc_irq_domain) { pr_err("%s: unable to create an interrupt domain\n", __func__); - return -EINVAL; + ret = -EINVAL; + goto err_free_descs; } set_handle_irq(davinci_cp_intc_handle_irq); @@ -228,6 +231,14 @@ davinci_cp_intc_do_init(const struct davinci_cp_intc_config *config, davinci_cp_intc_write(1, DAVINCI_CP_INTC_GLOBAL_ENABLE); return 0; + +err_free_descs: + irq_free_descs(irq_base, config->num_irqs); +err_iounmap: + iounmap(davinci_cp_intc_base); +err_release: + release_mem_region(config->reg.start, resource_size(&config->reg)); + return ret; } int __init davinci_cp_intc_init(const struct davinci_cp_intc_config *config)