From patchwork Wed Jun 24 07:29:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tiezhu Yang X-Patchwork-Id: 11622461 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2F39C618 for ; Wed, 24 Jun 2020 07:30:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1EA412082F for ; Wed, 24 Jun 2020 07:30:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387871AbgFXH3z (ORCPT ); Wed, 24 Jun 2020 03:29:55 -0400 Received: from mail.loongson.cn ([114.242.206.163]:59658 "EHLO loongson.cn" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1733114AbgFXH3z (ORCPT ); Wed, 24 Jun 2020 03:29:55 -0400 Received: from linux.localdomain (unknown [113.200.148.30]) by mail.loongson.cn (Coremail) with SMTP id AQAAf9Dx_93mAPNezSRJAA--.399S7; Wed, 24 Jun 2020 15:29:45 +0800 (CST) From: Tiezhu Yang To: Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring Cc: Huacai Chen , Jiaxun Yang , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-mips@vger.kernel.org, Xuefeng Li Subject: [PATCH v3 05/14] irqchip/davinci-cp-intc: Fix potential resource leaks Date: Wed, 24 Jun 2020 15:29:33 +0800 Message-Id: <1592983782-8842-6-git-send-email-yangtiezhu@loongson.cn> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1592983782-8842-1-git-send-email-yangtiezhu@loongson.cn> References: <1592983782-8842-1-git-send-email-yangtiezhu@loongson.cn> X-CM-TRANSID: AQAAf9Dx_93mAPNezSRJAA--.399S7 X-Coremail-Antispam: 1UD129KBjvJXoW7WrWDJr4xWw43Zr18WF13CFg_yoW8KFyrpr 4fJ3y3Gr48Jr1rXrs3AFyrWFnxKw1DCrW2krW7Cas7CrsYvryqyr15KF1DZFyUua1UZr1j yan3G3W09Fy5Zw7anT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUmF14x267AKxVWrJVCq3wAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2048vs2IY020E87I2jVAFwI0_JF0E3s1l82xGYI kIc2x26xkF7I0E14v26ryj6s0DM28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48ve4kI8wA2 z4x0Y4vE2Ix0cI8IcVAFwI0_Ar0_tr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI0_Gr1j6F 4UJwA2z4x0Y4vEx4A2jsIE14v26F4UJVW0owA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_GcCE 3s1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2I x0cI8IcVAFwI0_JrI_JrylYx0Ex4A2jsIE14v26r4j6F4UMcvjeVCFs4IE7xkEbVWUJVW8 JwACjcxG0xvY0x0EwIxGrwACjI8F5VA0II8E6IAqYI8I648v4I1lFIxGxcIEc7CjxVA2Y2 ka0xkIwI1lc2xSY4AK67AK6r4xMxAIw28IcxkI7VAKI48JMxC20s026xCaFVCjc4AY6r1j 6r4UMI8I3I0E5I8CrVAFwI0_Jr0_Jr4lx2IqxVCjr7xvwVAFwI0_JrI_JrWlx4CE17CEb7 AF67AKxVWUtVW8ZwCIc40Y0x0EwIxGrwCI42IY6xIIjxv20xvE14v26ryj6F1UMIIF0xvE 2Ix0cI8IcVCY1x0267AKxVWxJVW8Jr1lIxAIcVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0x vEx4A2jsIE14v26r4UJVWxJr1lIxAIcVC2z280aVCY1x0267AKxVWxJr0_GcJvcSsGvfC2 KfnxnUUI43ZEXa7VUbzuWJUUUUU== X-CM-SenderInfo: p1dqw3xlh2x3gn0dqz5rrqw2lrqou0/ Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org There exists potential resource leaks in the error path, fix them. Fixes: 0fc3d74cf946 ("irqchip: davinci-cp-intc: move the driver to drivers/irqchip") Signed-off-by: Tiezhu Yang --- drivers/irqchip/irq-davinci-cp-intc.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/irqchip/irq-davinci-cp-intc.c b/drivers/irqchip/irq-davinci-cp-intc.c index 276da277..2c2e115 100644 --- a/drivers/irqchip/irq-davinci-cp-intc.c +++ b/drivers/irqchip/irq-davinci-cp-intc.c @@ -162,6 +162,7 @@ davinci_cp_intc_do_init(const struct davinci_cp_intc_config *config, unsigned int num_regs = BITS_TO_LONGS(config->num_irqs); int offset, irq_base; void __iomem *req; + int ret; req = request_mem_region(config->reg.start, resource_size(&config->reg), @@ -175,7 +176,8 @@ davinci_cp_intc_do_init(const struct davinci_cp_intc_config *config, resource_size(&config->reg)); if (!davinci_cp_intc_base) { pr_err("%s: unable to ioremap register range\n", __func__); - return -EINVAL; + ret = -EINVAL; + goto err_release; } davinci_cp_intc_write(0, DAVINCI_CP_INTC_GLOBAL_ENABLE); @@ -210,7 +212,8 @@ davinci_cp_intc_do_init(const struct davinci_cp_intc_config *config, if (irq_base < 0) { pr_err("%s: unable to allocate interrupt descriptors: %d\n", __func__, irq_base); - return irq_base; + ret = irq_base; + goto err_iounmap; } davinci_cp_intc_irq_domain = irq_domain_add_legacy( @@ -219,7 +222,8 @@ davinci_cp_intc_do_init(const struct davinci_cp_intc_config *config, if (!davinci_cp_intc_irq_domain) { pr_err("%s: unable to create an interrupt domain\n", __func__); - return -EINVAL; + ret = -EINVAL; + goto err_free_descs; } set_handle_irq(davinci_cp_intc_handle_irq); @@ -228,6 +232,14 @@ davinci_cp_intc_do_init(const struct davinci_cp_intc_config *config, davinci_cp_intc_write(1, DAVINCI_CP_INTC_GLOBAL_ENABLE); return 0; + +err_free_descs: + irq_free_descs(irq_base, config->num_irqs); +err_iounmap: + iounmap(davinci_cp_intc_base); +err_release: + release_mem_region(config->reg.start, resource_size(&config->reg)); + return ret; } int __init davinci_cp_intc_init(const struct davinci_cp_intc_config *config)