| Message ID | 1596000130-8689-2-git-send-email-chenhc@lemote.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [1/5] dt-bindings: interrupt-controller: Update Loongson HTVEC description | expand |
diff --git a/arch/mips/boot/dts/loongson/loongson64g_4core_ls7a.dts b/arch/mips/boot/dts/loongson/loongson64g_4core_ls7a.dts index bdc911e..c945f85 100644 --- a/arch/mips/boot/dts/loongson/loongson64g_4core_ls7a.dts +++ b/arch/mips/boot/dts/loongson/loongson64g_4core_ls7a.dts @@ -20,7 +20,11 @@ interrupts = <24 IRQ_TYPE_LEVEL_HIGH>, <25 IRQ_TYPE_LEVEL_HIGH>, <26 IRQ_TYPE_LEVEL_HIGH>, - <27 IRQ_TYPE_LEVEL_HIGH>; + <27 IRQ_TYPE_LEVEL_HIGH>, + <28 IRQ_TYPE_LEVEL_HIGH>, + <29 IRQ_TYPE_LEVEL_HIGH>, + <30 IRQ_TYPE_LEVEL_HIGH>, + <31 IRQ_TYPE_LEVEL_HIGH>; }; }; @@ -31,7 +35,7 @@ interrupt-controller; msi-controller; loongson,msi-base-vec = <64>; - loongson,msi-num-vecs = <128>; + loongson,msi-num-vecs = <192>; interrupt-parent = <&htvec>; }; };
HT irqs vectors are 8 groups, each group has 32 irqs, Loongson64C CPUs can use only 4 groups and Loongson64G CPUs can use all 8 groups. So the number of msi vectors of Loongson64G is 192 (32*8 - 64 = 192). Signed-off-by: Huacai Chen <chenhc@lemote.com> --- arch/mips/boot/dts/loongson/loongson64g_4core_ls7a.dts | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-)