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[2/3] MIPS: Loongson64: DTS: Add SPI support to LS3A

Message ID 1606123148-315-2-git-send-email-zhangqing@loongson.cn (mailing list archive)
State Changes Requested
Headers show
Series [1/3] spi: Loongson: Add Loongson 3A+7A SPI controller driver support | expand

Commit Message

Qing Zhang Nov. 23, 2020, 9:19 a.m. UTC
The LS3A SPI module is now supported, enable it.

Signed-off-by: Qing Zhang <zhangqing@loongson.cn>
---
 arch/mips/boot/dts/loongson/loongson64c-package.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

Comments

Jiaxun Yang Nov. 23, 2020, 10:48 a.m. UTC | #1
在 2020/11/23 17:19, Qing Zhang 写道:
> The LS3A SPI module is now supported, enable it.
>
> Signed-off-by: Qing Zhang <zhangqing@loongson.cn>
> ---
>   arch/mips/boot/dts/loongson/loongson64c-package.dtsi | 7 +++++++
>   1 file changed, 7 insertions(+)
>
> diff --git a/arch/mips/boot/dts/loongson/loongson64c-package.dtsi b/arch/mips/boot/dts/loongson/loongson64c-package.dtsi
> index 5bb876a..2025c5a 100644
> --- a/arch/mips/boot/dts/loongson/loongson64c-package.dtsi
> +++ b/arch/mips/boot/dts/loongson/loongson64c-package.dtsi
> @@ -60,5 +60,12 @@
>   			interrupt-parent = <&liointc>;
>   			no-loopback-test;
>   		};
> +
> +                spi: spi@1fe00220 {
> +                        compatible = "loongson,loongson-spi";

You have to add dt schema document..

Also I'd sugguest you to name it as loongson,pci-spi to avoid collision.

Loongson-1 MCUs do have MMIO SPI controller with similiar register layout.

Thanks

- Jiaxun

> +                        reg=<0 0x1fe00220 0x11>;
> +                        #address-cells = <1>;
> +                        #size-cells = <0>;
> +               };
>   	};
>   };
diff mbox series

Patch

diff --git a/arch/mips/boot/dts/loongson/loongson64c-package.dtsi b/arch/mips/boot/dts/loongson/loongson64c-package.dtsi
index 5bb876a..2025c5a 100644
--- a/arch/mips/boot/dts/loongson/loongson64c-package.dtsi
+++ b/arch/mips/boot/dts/loongson/loongson64c-package.dtsi
@@ -60,5 +60,12 @@ 
 			interrupt-parent = <&liointc>;
 			no-loopback-test;
 		};
+
+                spi: spi@1fe00220 {
+                        compatible = "loongson,loongson-spi";
+                        reg=<0 0x1fe00220 0x11>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+               };
 	};
 };