From patchwork Tue Dec 8 07:44:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qing Zhang X-Patchwork-Id: 11957827 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 95DB5C2BB9A for ; Tue, 8 Dec 2020 07:45:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 76A4123A40 for ; Tue, 8 Dec 2020 07:45:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727725AbgLHHp0 (ORCPT ); Tue, 8 Dec 2020 02:45:26 -0500 Received: from mail.loongson.cn ([114.242.206.163]:42938 "EHLO loongson.cn" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727391AbgLHHp0 (ORCPT ); Tue, 8 Dec 2020 02:45:26 -0500 Received: from linux.localdomain (unknown [113.200.148.30]) by mail.loongson.cn (Coremail) with SMTP id AQAAf9Dx_3_hLs9fTZ8aAA--.48083S4; Tue, 08 Dec 2020 15:44:35 +0800 (CST) From: Qing Zhang To: Mark Brown , Rob Herring , Thomas Bogendoerfer Cc: linux-spi@vger.kernel.org, Huacai Chen , Jiaxun Yang , devicetree@vger.kernel.org, linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, gaojuxin@loongson.cn, yangtiezhu@loongson.cn Subject: [PATCH v2 3/4] MIPS: Loongson64: DTS: Add SPI support to LS7A Date: Tue, 8 Dec 2020 15:44:26 +0800 Message-Id: <1607413467-17698-3-git-send-email-zhangqing@loongson.cn> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1607413467-17698-1-git-send-email-zhangqing@loongson.cn> References: <1607413467-17698-1-git-send-email-zhangqing@loongson.cn> X-CM-TRANSID: AQAAf9Dx_3_hLs9fTZ8aAA--.48083S4 X-Coremail-Antispam: 1UD129KBjvdXoWrtFWfCFW3Wr43tr43Gr15Arb_yoWDArcEy3 ZFgrW3GrWrJF9rCayDZw4DCFy7u3y8CayrA3WkJr1DW3yvyrnxJFWkJrWDJ3WUurWYyrs5 KF4rXF4kAw17KjkaLaAFLSUrUUUUjb8apTn2vfkv8UJUUUU8Yxn0WfASr-VFAUDa7-sFnT 9fnUUIcSsGvfJTRUUUbykFF20E14v26rWj6s0DM7CY07I20VC2zVCF04k26cxKx2IYs7xG 6rWj6s0DM7CIcVAFz4kK6r1j6r18M28IrcIa0xkI8VA2jI8067AKxVWUXwA2048vs2IY02 0Ec7CjxVAFwI0_Xr0E3s1l8cAvFVAK0II2c7xJM28CjxkF64kEwVA0rcxSw2x7M28EF7xv wVC0I7IYx2IY67AKxVW7JVWDJwA2z4x0Y4vE2Ix0cI8IcVCY1x0267AKxVW8Jr0_Cr1UM2 8EF7xvwVC2z280aVAFwI0_Cr1j6rxdM28EF7xvwVC2z280aVCY1x0267AKxVW0oVCq3wAS 0I0E0xvYzxvE52x082IY62kv0487Mc02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0I7IYx2 IY67AKxVWUGVWUXwAv7VC2z280aVAFwI0_Gr0_Cr1lOx8S6xCaFVCjc4AY6r1j6r4UM4x0 Y48IcxkI7VAKI48JM4x0x7Aq67IIx4CEVc8vx2IErcIFxwACI402YVCY1x02628vn2kIc2 xKxwCY02Avz4vE14v_GF4l42xK82IYc2Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1l x2IqxVAqx4xG67AKxVWUJVWUGwC20s026x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14 v26r1q6r43MIIYrxkI7VAKI48JMIIF0xvE2Ix0cI8IcVAFwI0_JFI_Gr1lIxAIcVC0I7IY x2IY6xkF7I0E14v26r4j6F4UMIIF0xvE42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87 Iv67AKxVW8JVWxJwCI42IY6I8E87Iv6xkF7I0E14v26r4UJVWxJrUvcSsGvfC2KfnxnUUI 43ZEXa7VUbco7tUUUUU== X-CM-SenderInfo: x2kd0wptlqwqxorr0wxvrqhubq/ Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org add spi and amd node support. Signed-off-by: Qing Zhang --- v2: - Add spi about pci device DT --- arch/mips/boot/dts/loongson/ls7a-pch.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi index f99a7a1..ab8836b 100644 --- a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi +++ b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi @@ -405,6 +405,26 @@ interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &pic 39 IRQ_TYPE_LEVEL_HIGH>; }; + + spi@16,0 { + compatible = "pci0014,7a0b.0", + "pci0014,7a0b", + "pciclass088000", + "pciclass0880"; + + #address-cells = <1>; + #size-cells = <0>; + + reg = <0xb000 0x0 0x0 0x0 0x0>; + num-chipselects = <0>; + spiflash: s25fl016k@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible ="spansion,s25fl016k","jedec,spi-nor"; + spi-max-frequency=<50000000>; + reg=<0>; + }; + }; }; isa {