diff mbox series

[4/5] MIPS: Alchemy: update cpu-feature-overrides

Message ID 20181219070803.449981-5-manuel.lauss@gmail.com (mailing list archive)
State Accepted
Headers show
Series MIPS: Alchemy updates for 4.20+ | expand

Commit Message

Manuel Lauss Dec. 19, 2018, 7:08 a.m. UTC
No shiny new stuff for Alchemy.

Tested on DB1300 and DB1500.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
---
 arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h | 3 +++
 1 file changed, 3 insertions(+)

Comments

Paul Burton Dec. 23, 2018, 4:16 p.m. UTC | #1
Hello,

Manuel Lauss wrote:
> No shiny new stuff for Alchemy.
> 
> Tested on DB1300 and DB1500.
> 
> Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>

Applied to mips-fixes.

Thanks,
    Paul

[ This message was auto-generated; if you believe anything is incorrect
  then please email paul.burton@mips.com to report it. ]
diff mbox series

Patch

diff --git a/arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h b/arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h
index f439cf9cf9d1..ecfbb5aeada3 100644
--- a/arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h
@@ -75,10 +75,12 @@ 
 #define cpu_dcache_line_size()		32
 #define cpu_icache_line_size()		32
 #define cpu_scache_line_size()		0
+#define cpu_tcache_line_size()		0
 
 #define cpu_has_perf_cntr_intr_bit	0
 #define cpu_has_vz			0
 #define cpu_has_msa			0
+#define cpu_has_ufr			0
 #define cpu_has_fre			0
 #define cpu_has_cdmm			0
 #define cpu_has_small_pages		0
@@ -88,5 +90,6 @@ 
 #define cpu_has_badinstr		0
 #define cpu_has_badinstrp		0
 #define cpu_has_contextconfig		0
+#define cpu_has_perf			0
 
 #endif /* __ASM_MACH_AU1X00_CPU_FEATURE_OVERRIDES_H */