| Message ID | 20190118010634.27399-2-paul@crapouillou.net (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | [1/8] MIPS: DTS: CI20: Set BCH clock to 200 MHz | expand |
On Thu, 17 Jan 2019 22:06:28 -0300 Paul Cercueil <paul@crapouillou.net> wrote: > Add compatible strings to probe the jz4780-nand and jz4780-bch drivers > from devicetree on the JZ4725B SoC from Ingenic. > > Signed-off-by: Paul Cercueil <paul@crapouillou.net> Reviewed-by: Boris Brezillon <bbrezillon@kernel.org> > --- > Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt b/Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt > index 29ea5853ca91..8ebed442ac55 100644 > --- a/Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt > +++ b/Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt > @@ -6,7 +6,9 @@ memory-controllers/ingenic,jz4780-nemc.txt), and thus NAND device nodes must > be children of the NEMC node. > > Required NAND controller device properties: > -- compatible: Should be set to "ingenic,jz4780-nand". > +- compatible: Should be one of: > + * ingenic,jz4725b-nand > + * ingenic,jz4780-nand > - reg: For each bank with a NAND chip attached, should specify a bank number, > an offset of 0 and a size of 0x1000000 (i.e. the whole NEMC bank). > > @@ -72,7 +74,9 @@ NAND devices. The following is a description of the device properties for a > BCH controller. > > Required BCH properties: > -- compatible: Should be set to "ingenic,jz4780-bch". > +- compatible: Should be one of: > + * ingenic,jz4725b-bch > + * ingenic,jz4780-bch > - reg: Should specify the BCH controller registers location and length. > - clocks: Clock for the BCH controller. >
diff --git a/Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt b/Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt index 29ea5853ca91..8ebed442ac55 100644 --- a/Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt +++ b/Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt @@ -6,7 +6,9 @@ memory-controllers/ingenic,jz4780-nemc.txt), and thus NAND device nodes must be children of the NEMC node. Required NAND controller device properties: -- compatible: Should be set to "ingenic,jz4780-nand". +- compatible: Should be one of: + * ingenic,jz4725b-nand + * ingenic,jz4780-nand - reg: For each bank with a NAND chip attached, should specify a bank number, an offset of 0 and a size of 0x1000000 (i.e. the whole NEMC bank). @@ -72,7 +74,9 @@ NAND devices. The following is a description of the device properties for a BCH controller. Required BCH properties: -- compatible: Should be set to "ingenic,jz4780-bch". +- compatible: Should be one of: + * ingenic,jz4725b-bch + * ingenic,jz4780-bch - reg: Should specify the BCH controller registers location and length. - clocks: Clock for the BCH controller.
Add compatible strings to probe the jz4780-nand and jz4780-bch drivers from devicetree on the JZ4725B SoC from Ingenic. Signed-off-by: Paul Cercueil <paul@crapouillou.net> --- Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-)