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Mon, 22 Jul 2019 21:59:51 +0000 Received: from MWHPR2201MB1277.namprd22.prod.outlook.com ([fe80::49d3:37f8:217:c83]) by MWHPR2201MB1277.namprd22.prod.outlook.com ([fe80::49d3:37f8:217:c83%6]) with mapi id 15.20.2094.017; Mon, 22 Jul 2019 21:59:51 +0000 From: Paul Burton To: "linux-mips@vger.kernel.org" CC: Paul Burton Subject: [PATCH 2/4] MIPS: Remove unused R5432 CPU support Thread-Topic: [PATCH 2/4] MIPS: Remove unused R5432 CPU support Thread-Index: AQHVQNjJ72/2ELPZjkuS3GO9PX2IzQ== Date: Mon, 22 Jul 2019 21:59:50 +0000 Message-ID: <20190722215705.20109-2-paul.burton@mips.com> References: <20190722215705.20109-1-paul.burton@mips.com> In-Reply-To: <20190722215705.20109-1-paul.burton@mips.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: BYAPR11CA0057.namprd11.prod.outlook.com (2603:10b6:a03:80::34) To MWHPR2201MB1277.namprd22.prod.outlook.com (2603:10b6:301:18::12) authentication-results: spf=none (sender IP is ) smtp.mailfrom=pburton@wavecomp.com; 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received-spf: None (protection.outlook.com: wavecomp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: OyNWXWZR4EX11D8vqrbTRYGzu+KKG+U1xE4OoVe2dQSnKAK+ncUPG253ot7hZm5nL2LOwu3nwPbs0mSznvhTX2jMNhP7X0ovtOkhlakDeLg+a/OPefuSjnYmsrBxQeyWIdgMGAnVyt43fSRIzHLg72zDEyWkstgL56U2refX+N64aZowZg6e4dZfyRSG8LZ5oYSHGbWukSPWRdDIBF8I1jvipKbXHSnKN2/0pk3jWtS0YOnj8Echh9BJnI/N8RLjNcfCBhKf1oSYmHs74UDpHflwB9W/J86XWXj6PE7iBJoP5HkA/X4XYLZ6DqGbZWCBsA8COSXVbNsYhZsCNpIXWkDAxYg5o62Ebn2h+S6V8ckYBkOaMD9xBkL3QqQkG9CdykA/OOfqxRMse36LDhmrXd1L88hTf7bpaLSI19U/cZc= MIME-Version: 1.0 X-OriginatorOrg: mips.com X-MS-Exchange-CrossTenant-Network-Message-Id: 880c1c59-c9d2-4765-de2a-08d70eefeb8c X-MS-Exchange-CrossTenant-originalarrivaltime: 22 Jul 2019 21:59:50.9936 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 463607d3-1db3-40a0-8a29-970c56230104 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: pburton@wavecomp.com X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR2201MB1184 Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Our R5432 CPU support can only be included if a system selects CONFIG_SYS_HAS_CPU_R5432. No system does, making all R5432-related CPU support dead code. Remove it. Signed-off-by: Paul Burton --- arch/mips/Kconfig | 11 ----------- arch/mips/Makefile | 2 -- arch/mips/include/asm/cpu-type.h | 4 ---- arch/mips/include/asm/cpu.h | 2 +- arch/mips/include/asm/module.h | 2 -- arch/mips/kernel/cpu-probe.c | 8 -------- arch/mips/mm/c-r4k.c | 1 - arch/mips/mm/tlbex.c | 1 - 8 files changed, 1 insertion(+), 30 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 2b28c6b02ff9..0f4e1a7eb006 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1629,14 +1629,6 @@ config CPU_R5000 help MIPS Technologies R5000-series processors other than the Nevada. -config CPU_R5432 - bool "R5432" - depends on SYS_HAS_CPU_R5432 - select CPU_SUPPORTS_32BIT_KERNEL - select CPU_SUPPORTS_64BIT_KERNEL - select CPU_SUPPORTS_HUGEPAGES - select CPU_HAS_LOAD_STORE_LR - config CPU_R5500 bool "R5500" depends on SYS_HAS_CPU_R5500 @@ -1969,9 +1961,6 @@ config SYS_HAS_CPU_TX49XX config SYS_HAS_CPU_R5000 bool -config SYS_HAS_CPU_R5432 - bool - config SYS_HAS_CPU_R5500 bool diff --git a/arch/mips/Makefile b/arch/mips/Makefile index e728d0555466..e507e5b6e606 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -173,8 +173,6 @@ cflags-$(CONFIG_CPU_MIPS64_R1) += -march=mips64 -Wa,--trap cflags-$(CONFIG_CPU_MIPS64_R2) += -march=mips64r2 -Wa,--trap cflags-$(CONFIG_CPU_MIPS64_R6) += -march=mips64r6 -Wa,--trap cflags-$(CONFIG_CPU_R5000) += -march=r5000 -Wa,--trap -cflags-$(CONFIG_CPU_R5432) += $(call cc-option,-march=r5400,-march=r5000) \ - -Wa,--trap cflags-$(CONFIG_CPU_R5500) += $(call cc-option,-march=r5500,-march=r5000) \ -Wa,--trap cflags-$(CONFIG_CPU_NEVADA) += $(call cc-option,-march=rm5200,-march=r5000) \ diff --git a/arch/mips/include/asm/cpu-type.h b/arch/mips/include/asm/cpu-type.h index 9774e6d0403f..2f1677c360c4 100644 --- a/arch/mips/include/asm/cpu-type.h +++ b/arch/mips/include/asm/cpu-type.h @@ -138,10 +138,6 @@ static inline int __pure __get_cpu_type(const int cpu_type) case CPU_R5000: #endif -#ifdef CONFIG_SYS_HAS_CPU_R5432 - case CPU_R5432: -#endif - #ifdef CONFIG_SYS_HAS_CPU_R5500 case CPU_R5500: #endif diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index c70c43fc9e09..0f52e4b099ea 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h @@ -295,7 +295,7 @@ enum cpu_type_enum { */ CPU_R4000PC, CPU_R4000SC, CPU_R4000MC, CPU_R4200, CPU_R4400PC, CPU_R4400SC, CPU_R4400MC, CPU_R4600, CPU_R4640, CPU_R4650, - CPU_R4700, CPU_R5000, CPU_R5500, CPU_NEVADA, CPU_R5432, CPU_R10000, + CPU_R4700, CPU_R5000, CPU_R5500, CPU_NEVADA, CPU_R10000, CPU_R12000, CPU_R14000, CPU_R16000, CPU_VR41XX, CPU_VR4111, CPU_VR4121, CPU_VR4122, CPU_VR4131, CPU_VR4133, CPU_VR4181, CPU_VR4181A, CPU_RM7000, CPU_SR71000, CPU_TX49XX, diff --git a/arch/mips/include/asm/module.h b/arch/mips/include/asm/module.h index eaf3f37ed583..92cb94ef0231 100644 --- a/arch/mips/include/asm/module.h +++ b/arch/mips/include/asm/module.h @@ -109,8 +109,6 @@ search_module_dbetables(unsigned long addr) #define MODULE_PROC_FAMILY "TX49XX " #elif defined CONFIG_CPU_R5000 #define MODULE_PROC_FAMILY "R5000 " -#elif defined CONFIG_CPU_R5432 -#define MODULE_PROC_FAMILY "R5432 " #elif defined CONFIG_CPU_R5500 #define MODULE_PROC_FAMILY "R5500 " #elif defined CONFIG_CPU_NEVADA diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index d70bd6542a9f..be717be2ca5f 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -1459,14 +1459,6 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu) MIPS_CPU_LLSC; c->tlbsize = 48; break; - case PRID_IMP_R5432: - c->cputype = CPU_R5432; - __cpu_name[cpu] = "R5432"; - set_isa(c, MIPS_CPU_ISA_IV); - c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | - MIPS_CPU_WATCH | MIPS_CPU_LLSC; - c->tlbsize = 48; - break; case PRID_IMP_R5500: c->cputype = CPU_R5500; __cpu_name[cpu] = "R5500"; diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 07d9aa4f7491..89b9c851d822 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -1098,7 +1098,6 @@ static void probe_pcache(void) c->options |= MIPS_CPU_CACHE_CDEX_P; break; - case CPU_R5432: case CPU_R5500: icache_size = 1 << (12 + ((config & CONF_IC) >> 9)); c->icache.linesz = 16 << ((config & CONF_IB) >> 5); diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index b5dde6f4423c..9b2fcf421321 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -603,7 +603,6 @@ void build_tlb_write_entry(u32 **p, struct uasm_label **l, case CPU_VR4131: case CPU_VR4133: - case CPU_R5432: uasm_i_nop(p); uasm_i_nop(p); tlbw(p);