Message ID | 20190727175315.28834-5-martin.blumenstingl@googlemail.com (mailing list archive) |
---|---|
State | Changes Requested |
Headers | show |
Series | MIPS: lantiq: EBU interrupt controller and generalization | expand |
diff --git a/arch/mips/boot/dts/lantiq/danube.dtsi b/arch/mips/boot/dts/lantiq/danube.dtsi index 510be63c8bdf..0208174b53c8 100644 --- a/arch/mips/boot/dts/lantiq/danube.dtsi +++ b/arch/mips/boot/dts/lantiq/danube.dtsi @@ -89,6 +89,9 @@ ebu0: ebu@e105300 { compatible = "lantiq,ebu-xway"; reg = <0xe105300 0x100>; + interrupt-parent = <&icu0>; + interrupts = <30>; + #interrupt-cells = <2>; }; pci0: pci@e105400 {
The EBU IP block provides one interrupt line for PCI_INTA. Mark the ebu0 node as interrupt-controller and pass the parent interrupt from ICU so the PCI_INTA interrupt from EBU can be used. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> --- arch/mips/boot/dts/lantiq/danube.dtsi | 3 +++ 1 file changed, 3 insertions(+)