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received-spf: None (protection.outlook.com: wavecomp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: 0xVEJ0+Hike8vH6HiFQ5zdqkxmQPmIB3hvBnS81IWNb/KzPIIuSxdCgM7Yw4r7iLRsN7oj8HUo2MdhUdl/ght4KPOSdjLrTDLx380ojE0W6jsfuKtYSZDwLDbGnZ4J3e329UZ/+Nm8qwlU6IFcPGYXEjvcmF+i8NSWc1TvZ5AGu4N+iYJ9t5Sqp3on0fwE48unvqqpFtN26hdOawcvFqReBiniTm7ese/2G0M8lAlUD+VWFLro4Dwq2dZyHybL6xx0KNLOgfLIoKDsE6VLjFI5XJtwokZunUKWyNjYgDlw3mDvOWr4YXhXUVcS1i4inP53vy+n1c+G4RAtU6VfSaLk+8oDznvrLwMC4WT3tpUEzDRbq+8CpGtJqe4WjI3hRdI7rNKzvRmjb0fTwkzOlla6mCxoG4FhlyfL7lNPnYMPg= MIME-Version: 1.0 X-OriginatorOrg: mips.com X-MS-Exchange-CrossTenant-Network-Message-Id: e95359e3-2061-46ee-9aba-08d745fb2405 X-MS-Exchange-CrossTenant-originalarrivaltime: 30 Sep 2019 23:08:44.1618 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 463607d3-1db3-40a0-8a29-970c56230104 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 7vOFl4ys0Qyb1LOOiP/GWyOxyq871aQlvrHqw6ZQR1nCE8sydOh080dcZ61maUzNmOTCz9u092hL61d54iAtAQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR2201MB1022 Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Loongson3 systems with CONFIG_CPU_LOONGSON3_WORKAROUNDS enabled already emit a full completion barrier as part of the inline assembly containing LL/SC loops for atomic operations. As such the barrier emitted by __smp_mb__before_atomic() is redundant, and we can remove it. Signed-off-by: Paul Burton --- arch/mips/include/asm/barrier.h | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/arch/mips/include/asm/barrier.h b/arch/mips/include/asm/barrier.h index 1a99a6c5b5dd..f3b5aa0938c1 100644 --- a/arch/mips/include/asm/barrier.h +++ b/arch/mips/include/asm/barrier.h @@ -118,7 +118,17 @@ static inline void wmb(void) #define nudge_writes() mb() #endif -#define __smp_mb__before_atomic() __smp_mb__before_llsc() +/* + * In the Loongson3 LL/SC workaround case, all of our LL/SC loops already have + * a completion barrier immediately preceding the LL instruction. Therefore we + * can skip emitting a barrier from __smp_mb__before_atomic(). + */ +#ifdef CONFIG_CPU_LOONGSON3_WORKAROUNDS +# define __smp_mb__before_atomic() +#else +# define __smp_mb__before_atomic() __smp_mb__before_llsc() +#endif + #define __smp_mb__after_atomic() smp_llsc_mb() static inline void sync_ginv(void)